Display device
View Patent ↗Provided is a display device including first and second gate interconnections; a first pixel circuit disposed at one side of the first gate interconnection, the first pixel circuit including a first transistor, a gate electrode of the first transistor electrically connected to the first gate interconnection, a source electrode of the first transistor formed in a source layer, the source electrode including a first source electrode facing portion overlapping with the gate electrode; and a second pixel circuit disposed at the other side of the second gate interconnection, the second pixel circuit including a second transistor, a gate electrode of the second transistor electrically connected to the second gate interconnection, a source electrode of the second transistor formed in the source layer, the source electrode including a second source electrode facing portion overlapping with the gate electrode and stretched along the first source electrode facing portion.
1. A display device comprising:
first and second gate interconnections extending along with each other;
a first pixel circuit being disposed at a first side of the first gate interconnection, the first pixel circuit comprising a first transistor including a gate electrode, a source electrode and a drain electrode, the gate electrode of the first transistor being formed in a gate electrode layer and being electrically connected to the first gate interconnection, the source electrode of the first transistor being formed in a source electrode layer, the source electrode of the first transistor including a first source electrode facing portion overlapping with the gate electrode of the first transistor in the plan view and stretching to its end in a predetermined stretching direction; and
a second pixel circuit being disposed at a second side of the second gate interconnection opposite to the first side, the second pixel circuit comprising a second transistor including a gate electrode, a source electrode, and a drain electrode, the gate electrode of the second transistor being formed in the gate electrode layer and being electrically connected to the second gate interconnection, the source electrode of the second transistor being formed in the source electrode layer, the source electrode of the second transistor including a second source electrode facing portion overlapping with the gate electrode of the second transistor in the plan view and stretching to its end in the same predetermined stretching direction as the first source electrode facing portion stretches.
2. The display device according to claim 1 , wherein the first gate interconnection stretches in the same stretching direction as the first and second source electrode facing portions.
3. The display device according to claim 2 ,
wherein the length of the first source electrode facing portion in the stretching direction is longer than the width of the first source electrode facing portion, and
wherein the length of the second source electrode facing portion in the stretching direction is longer than the width of the second source electrode facing portion.
4. The display device according to claim 1 ,
wherein the drain electrode of the first transistor includes a first drain electrode facing portion which overlaps with the gate electrode of the first transistor in the plan view and stretches to its end in a reverse direction of the stretching direction of the first and second source electrode facing portions, and
wherein the drain electrode of the second transistor includes a second drain electrode facing portion which overlaps with the gate electrode of the second transistor in the plan view and stretches to its end in the same reverse direction as the first drain electrode facing portion stretches.
5. The display device according to claim 4 , further comprising:
a data signal interconnection being electrically connected to the drain electrode of the first transistor, the data signal interconnection being branched and extending to the drain electrode of the first transistor.
6. The display device according to claim 4 , wherein the drain electrode of the second transistor is disposed with respect to the source electrode of the second transistor in accordance with the arrangement of the first drain electrode with respect to the source electrode of the first transistor.