IP Library Granted Patent US 8,638,634
Granted Patent B2
US 8,638,634 · App. 13/037,621 · Granted Jan 28, 2014

Apparatus and method to measure energy capacity of a backup power supply without compromising power delivery

Inventor: Lane Hauck (San Diego, CA)
Assignee: AgigA Tech Inc.
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Quick Facts
Patent No.
US 8,638,634
App. No.
13/037,621
Granted
Jan 28, 2014
Kind
B2
Abstract

A device includes a backup power supply configured to provide power to an external system upon loss of primary system power, the backup power provided by at least one capacitor; logic to create, while the capacitor is available as the backup power supply to the external system, a transient elevation of the capacitor's stored potential above a upper predetermined operating potential of the capacitor; logic to obtain measurements of the capacitor's output voltage during the transient elevation of the capacitor's stored potential; and logic to determine a capacitance of the capacitor from the measurements; the device comprising multiple capacitors in series; logic to discharge each capacitor in series individually from the others; and logic to monitor for overcharging of any of the capacitors in series, and, during charging of the capacitors in series, to operate the discharge logic for any capacitor in the series that is in danger of overcharging.

Claims (49)

1. A device, comprising:

a backup power supply configured to provide power to an external system upon loss of primary system power, the backup power provided by at least one capacitor;

logic to create, while the capacitor is available as the backup power supply to the external system, a transient elevation of the capacitor's stored potential above a upper predetermined operating potential of the capacitor;

logic to obtain measurements of the capacitor's output voltage during the transient elevation of the capacitor's stored potential, the transient elevation being a condition precedent of obtaining the measurements; and

logic to determine a capacitance of the capacitor from the measurements;

the device comprising multiple capacitors in series;

logic to discharge each capacitor in series individually from the others; and

logic to monitor for overcharging of any of the capacitors in series, and, during charging of the capacitors in series, to operate the discharge logic for any capacitor in the series that is in danger of overcharging.

2. The device of claim 1 , further comprising:

logic to obtain the measurements during an increasing phase of the capacitor's stored potential during the transient elevation.

3. The device of claim 2 , further comprising:

logic to perform, once the measurements are obtained, an accelerated discharge of the capacitor back to the capacitor's upper predetermined operating potential.

4. The device of claim 1 , further comprising:

logic to obtain the measurements during a decreasing phase of the capacitor's stored potential during the transient elevation.

5. The device of claim 1 , further comprising:

logic to time repeated transient elevations of the capacitor's stored potential over its upper predetermined operating potential, so that a percent of time during which the capacitor's stored potential is elevated over its upper predetermined operating potential to the time that, it is not so elevated is less than 0.1%.

6. A memory system, comprising:

a volatile memory;

a nonvolatile memory;

a backup power supply configured to provide power to the volatile and nonvolatile memories upon loss of primary system power, the backup power provided by at least one capacitor, logic to create, while the capacitor is available as the backup power supply to the volatile and nonvolatile memories, a transient elevation of the capacitor's stored potential above a upper predetermined operating potential of the capacitor;

logic to obtain measurements of the capacitor's output voltage during the transient elevation of the capacitor's stored potential, the transient elevation being a condition precedent to obtaining the measurements; and

logic to determine a capacitance of the capacitor from the measurements;

the memory system further comprising:

multiple capacitors in series;

logic to discharge each capacitor in series individually from the others; and

logic to monitor for overcharging of any of the capacitors in series, and, during charging of the capacitors in series, to operate the discharge logic for any capacitor in the series that is in danger of overcharging.

7. The memory system of claim 6 , further comprising:

logic to obtain the measurements during an increasing phase of the capacitor's stored potential during the transient elevation.

8. The memory system of claim 7 , further comprising:

logic to perform, once the measurements are obtained, an accelerated discharge of the capacitor back to the capacitor's upper predetermined operating potential.

9. The memory system of claim 6 , further comprising:

logic to obtain the measurements during a decreasing phase of the capacitor's stored potential during the transient elevation.

10. The memory system of claim 6 , further comprising:

logic to time repeated transient elevations of the capacitor's stored potential over its upper predetermined operating potential, so that a percent of time during which the capacitor's stored potential is elevated over its upper predetermined operating potential to the time that it is not so elevated is less than 0.1%.

11. A method, comprising:

while at least one capacitor is available as a backup power supply to an external system, creating a transient elevation of the capacitor's stored potential above a upper predetermined operating potential of the capacitors;

obtaining measurements of the capacitor's output potential during the transient elevation of the capacitor's stored potential, the transient elevation a condition precedent of obtaining the measurements; and

determining a capacitance of the capacitor from the measurements;

the method further comprising operating multiple capacitors in series as the backup power supply;

discharging each capacitor in series individually from the others; and

monitoring for overcharging of any of the capacitors in series, and, during charging of the capacitors in series, operating the discharge logic for any capacitor in the series that is in danger of overcharging.

12. The method of claim 11 , further comprising:

obtaining the measurements during an increasing phase of the capacitor's stored potential during the transient elevation.

13. The method of claim 12 , further comprising:

performing, once the measurements are obtained, an accelerated discharge of the capacitor back to the capacitor's upper predetermined operating potential.

14. The method of claim 11 , further comprising:

obtaining the measurements during a decreasing phase of the capacitor's stored potential during the transient elevation.

15. The method of claim 11 , further comprising:

timing repeated transient elevations of the capacitors' stored potential over its upper predetermined operating potential so that a percent of time during which the capacitors' stored potential is elevated over their upper predetermined operating potential to the time that they are not so elevated is less than 0.1%.

Assignments (2)
MERGER Recorded Apr 23, 2025
From: AGIGA TECH, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 070926/0472 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2011
From: HAUCK, LANE
To: AGIGA TECH INC.
Reel/Frame 025890/0210 →
Continuity (1)
Related Publication 20120224445A1 · Sep 6, 2012