IP Library Granted Patent US 8,258,858
Granted Patent B2
US 8,258,858 · App. 13/040,733 · Granted Sep 4, 2012

Circuit for generating a control current

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Quick Facts
Patent No.
US 8,258,858
App. No.
13/040,733
Granted
Sep 4, 2012
Kind
B2
Abstract

A circuit includes a supply voltage and a control current line including two resistors. A sink current line branches off from the control current line between the resistors. A current sink transistor has an emitter that is connected to the sink current line and a collector that is connected to ground via a first further resistor. At least one reference transistor has an emitter that is connected to its base, to the supply voltage via a second further resistor and to the base of the current sink transistor. The collector of the reference transistor is connected to ground or to an emitter of a further reference transistor, which is switched in a manner similar to the first reference transistor.

Claims (32)

1. A circuit comprising:

a supply voltage;

a control current line comprising two resistors;

a sink current line branching off from the control current line between the resistors;

a current sink transistor having a base, an emitter and a collector, the emitter being connected to the sink current line and the collector being connected to ground via a first further resistor, and

at least one reference transistor having a base, an emitter and a collector, the emitter of the reference transistor being connected to the base, to the supply voltage via a second further resistor and to the base of the current sink transistor, the collector of the reference transistor being connected to ground.

2. The circuit of claim 1 , wherein the collector of the reference transistor is connected directly to ground.

3. The circuit of claim 1 , wherein the collector of the reference transistor is connected to ground through a further reference transistor.

4. The circuit of claim 1 , further comprising a third further resistor, wherein the base of the current sink transistor and the emitter of the reference transistor are connected to ground via the third further resistor.

5. The circuit of claim 1 , further comprising a bias circuit based on a reference current, the bias circuit being connected to the supply voltage and to the control current line.

6. The circuit of claim 1 , wherein the bias circuit comprises first, second and third transistors, each having a base, an emitter and a collector;

wherein the bases of the first and the second transistors are connected to one another, to the control current line and to the emitter of the third transistor of the bias circuit;

wherein the emitters of the first and second transistors are connected to the supply voltage;

wherein the collector of the first transistor is connected to ground via a fourth further resistor and to the base of the third transistor;

wherein the collector of the third transistor is connected to ground; and

wherein the collector of the second transistor supplies a bias current.

7. The circuit of claim 1 , wherein the circuit is configured to generate a control current that is independent of voltage variations.

8. A circuit comprising:

a supply voltage;

a control current line comprising two resistors;

a sink current line branching off from the control current line between the resistors;

a current sink transistor having a base, an emitter and a collector, the emitter being connected to the sink current line and the collector being connected to ground via a first further resistor, and

at least one reference transistor having a base, an emitter and a collector, the emitter of the reference transistor being connected to the base, to the supply voltage via a second further resistor and to the base of the current sink transistor, the collector of the reference transistor being connected to an emitter of a further reference transistor, which is switched in a manner similar to the first reference transistor.

9. The circuit of claim 8 , further comprising a third further resistor, wherein the base of the current sink transistor and the emitter of the reference transistor are connected to ground via the third further resistor.

10. The circuit of claim 8 , further comprising a bias circuit based on a reference current, the bias circuit being connected to the supply voltage and to the control current line.

11. The circuit of claim 8 , wherein the bias circuit comprises first, second and third transistors, each having a base, an emitter and a collector;

wherein the bases of the first and the second transistors are connected to one another, to the control current line and to the emitter of the third transistor of the bias circuit;

wherein the emitters of the first and second transistors are connected to the supply voltage;

wherein the collector of the first transistor is connected to ground via a fourth further resistor and to the base of the third transistor;

wherein the collector of the third transistor is connected to ground; and

wherein the collector of the second transistor supplies a bias current.

12. The circuit of claim 8 , wherein the circuit is configured to generate a control current that is independent of voltage variations.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2017
From: EPCOS AG
To: SNAPTRACK, INC.
Reel/Frame 041608/0145 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2011
From: SPITS, ERWIN
To: EPCOS AG
Reel/Frame 026302/0455 →