IP Library Granted Patent US 8,410,839
Granted Patent B2
US 8,410,839 · App. 13/041,065 · Granted Apr 2, 2013

Systems and methods for driving high power states using lower voltage processes

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Quick Facts
Patent No.
US 8,410,839
App. No.
13/041,065
Granted
Apr 2, 2013
Kind
B2
Abstract

A battery assisted level shifter comprises a pull up transistor pulling up an output when a received input signal is high, a pull down transistor pulling down the output when the received input signal is low, and a battery element to provide voltage offsets. The battery element can be implemented using one or more pull-up transistors for assisting with pulling up the output. The level shifter can be used in class-D amplifiers, DC-DC power converters and interfaces between circuits having different reference voltages.

Claims (50)

1. A circuit comprising:

a pull-up transistor coupled to an output and operable to receive a control signal;

a pull-down transistor coupled to the pull-up transistor and the output and operable to receive the control signal;

a battery element coupled between either of 1) a high supply rail having a high supply voltage or a low supply rail having a low supply voltage and 2) the pull-up transistor or the pull-down transistor, respectively, wherein the battery element maintains a voltage substantially equal to the high supply voltage minus the low supply voltage and a target swing voltage.

2. The circuit of claim 1 , wherein the pull-up transistor is a p-type field effect transistor (PFET).

3. The circuit of claim 1 , wherein the pull-down transistor is an n-type field effect transistor (NFET).

4. The circuit of claim 1 , wherein the battery element is coupled to the low supply rail and the pull-down transistor.

5. The circuit of claim 4 , wherein the battery element comprises:

a transistor having an input and terminals, said terminals coupled to the low supply rail and the pull down transistor;

a bias network coupled to the input of the battery element transistor; and

a clamping transistor coupled to the high supply rail, the battery element transistor, and a clamping voltage.

6. The circuit of claim 5 wherein the clamping transistor has a threshold voltage and the clamping voltage is substantially equal to the high supply voltage minus the target swing voltage plus the threshold voltage.

7. The circuit of claim 5 wherein the bias network comprises:

an RC circuit;

a transistor coupled to the RC circuit;

a bias resistor coupled to the bias network transistor and the low supply rail; and

a voltage supply coupled to the high supply rail that maintains the swing voltage and coupled to the bias network transistor.

8. The circuit of claim 1 , wherein the battery element is coupled to the high supply rail and the pull-up transistor.

9. The circuit of claim 8 , wherein the battery element comprises:

a first transistor having an input and terminals, said terminals coupled to the high supply rail and the pull up transistor;

a bias network coupled to the input of the battery element transistor; and

a second transistor coupled to the low supply rail, the first transistor, and a clamping voltage.

10. The circuit of claim 9 wherein the first transistor has a threshold voltage and the clamping voltage is substantially equal to the low supply voltage plus the target swing voltage minus the threshold voltage.

11. The circuit of claim 9 wherein the bias network comprises:

an RC circuit;

a transistor coupled to the RC circuit;

a bias resistor coupled to the bias network transistor and the low supply rail; and

a voltage supply coupled to the high supply rail that maintains the swing voltage and coupled to the bias network transistor.

12. The circuit of claim 1 wherein a gate of the pull-up transistor is coupled to a gate of the pull-down transistor.

13. A method for generating a signal comprising:

pulling up an output to a high supply rail having a high supply voltage when an input signal is high;

pulling down the output to a positive terminal of a battery element when the input signal is low, the positive terminal having a voltage substantially equal to a battery voltage plus a low supply voltage; and

maintaining the battery voltage across the battery element at a value that is substantially equal to the high supply voltage minus 1) the low supply voltage and 2) a target swing voltage.

14. The method of claim 13 , wherein maintaining the battery voltage comprises:

biasing a battery transistor to maintain a voltage equal to a sum of 1) the target swing voltage and 2) a difference between the high supply voltage and the low supply voltage; and

clamping a positive terminal of the battery element to a voltage substantially equal to the high supply voltage minus the target swing voltage when the input signal goes low.

15. A method for generating a signal comprising:

pulling down an output to a low supply rail having a low supply voltage when an input signal is low;

pulling up the output to a negative terminal of a battery element when the input signal is low, the negative terminal having a voltage substantially equal to a high supply voltage minus a battery voltage; and

maintaining the battery voltage across the battery element substantially equal to the high supply voltage minus the low supply voltage and a target swing voltage.

16. The method of claim 15 , wherein maintaining the battery voltage comprises:

biasing a transistor to maintain a voltage equal to a sum of 1) the target swing voltage and 2) the difference between the high supply voltage and the low supply voltage; and

clamping the negative terminal of the battery element to a voltage substantially equal the low supply voltage plus the target swing voltage to when the input signal goes high.

17. A circuit comprising:

a pull-up transistor coupled to an output and operable to receive a control signal;

a pull-down transistor coupled to the pull-up transistor and the output and operable to receive the control signal; and

means for maintaining a voltage substantially equal to the high supply voltage minus the low supply voltage and a target swing voltage.

18. The circuit of claim 17 , wherein the pull-up transistor is a p-type field effect transistor (PFET).

19. The circuit of claim 17 , wherein the pull-down transistor is an n-type field effect transistor (NFET).

20. The circuit of claim 17 wherein a gate of the pull-up transistor is coupled to a gate of the pull-down transistor.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE 3RD INVENTORS NAME ON THE COVER SHEET AND THE SUPPORTING DOCUMENTS. PREVIOUSLY RECORDED AT REEL: 026263 FRAME: 0132. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 3, 2022
From: LARSEN, CHRISTIAN; CRESPI, LORENZO; PATEL, KETANKUMAR B.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 060269/0161 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2017
From: CONEXANT SYSTEMS, LLC
To: SYNAPTICS INCORPORATED
Reel/Frame 043786/0267 →
CHANGE OF NAME Recorded Jun 26, 2017
From: CONEXANT SYSTEMS, INC.
To: CONEXANT SYSTEMS, LLC
Reel/Frame 042986/0613 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2016
From: LAKESTAR SEMI INC.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 038803/0693 →
CHANGE OF NAME Recorded May 20, 2016
From: CONEXANT SYSTEMS, INC.
To: LAKESTAR SEMI INC.
Reel/Frame 038777/0885 →
RELEASE OF SECURITY INTEREST Recorded May 6, 2016
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
To: CONEXANT SYSTEMS, INC.; CONEXANT, INC.; CONEXANT SYSTEMS WORLDWIDE, INC.; BROOKTREE BROADBAND HOLDING, INC.
Reel/Frame 038631/0452 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2011
From: LARSEN, CHRISTIAN; CRESPI, LORENZO; PATEL, KETAN B.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 026263/0132 →
SECURITY AGREEMENT Recorded Apr 27, 2011
From: CONEXANT SYSTEMS, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
Reel/Frame 026188/0404 →