IP Library Granted Patent US 9,247,261
Granted Patent B2
US 9,247,261 · App. 13/041,680 · Granted Jan 26, 2016

Video decoder with pipeline processing and methods for use therewith

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Quick Facts
Patent No.
US 9,247,261
App. No.
13/041,680
Granted
Jan 26, 2016
Kind
B2
Abstract

A video decoder includes an entropy decoding device that includes a first processor that generates first entropy decoded (EDC) data from a first portion of an encoded video signal and further that generates second EDC data from a second portion of the encoded video signal. A general video decoding device includes a second processor that generates a first portion of a decoded video signal from the first EDC data and that further generates a second portion of the decoded video signal from the second EDC data. The entropy decoding device and the general video decoding device operate contemporaneously in a pipelined process where the general video decoding device generates the first portion of the decoded video signal during at least a portion of time that the entropy decoding device generates the second EDC data from the first portion of the encoded video signal.

Claims (19)

1. A video decoder comprising:

an entropy decoding device that includes a first processor that generates first entropy decoded (EDC) data from a first picture of an encoded video signal and further that generates second EDC data from a second picture of the encoded video signal; and

a general video decoding device, coupled to the entropy decoding device, that includes a second processor that generates a first picture of a decoded video signal from the first EDC data and that further generates a second picture of the decoded video signal from the second EDC data;

wherein the entropy decoding device and the general video decoding device operate contemporaneously in a pipelined process where the second processor generates the first picture of the decoded video signal during at least a portion of time that the first processor generates the second EDC data from the second picture of the encoded video signal.

2. The video decoder of claim 1 wherein the second processor further generates the first picture of the decoded video signal after the first processor generates the first EDC data from the first picture of the encoded video signal and during at least a portion of time that the first processor generates third EDC data from a third picture of the encoded video signal.

3. The video decoder of claim 1 wherein the first EDC data includes first run length data, first motion vector differential data, and first macroblock header data.

4. The video decoder of claim 1 wherein the encoded video signal includes a plurality of video layers and the first EDC data includes slice header data corresponding to at least one of the plurality of video layers.

5. The video decoder of claim 1 wherein the encoded video signal is encoded in accordance with at least one of an H.264 encoding standard and a video coding 1 (VC-1) encoding standard.

6. A method comprising:

generating first entropy decoded (EDC) data from a first picture of an encoded video signal via a first processor;

generating second EDC data from a second picture of the encoded video signal via the first processor; and

generating a first picture of a decoded video signal from the first EDC data via a second processor contemporaneously during at least a portion of time that the first processor generates the second EDC data from the second picture of the encoded video signal.

7. The method of claim 6 further comprising:

generating third EDC data from a third picture of the encoded video signal via the first processor; and

generating a second portion of the decoded video signal from the second EDC data via the second processor contemporaneously during at least a portion of time that the first processor generates the third EDC data from the third picture of the encoded video signal.

8. The method of claim 6 wherein the second picture is subsequent in time to the first picture in the encoded video signal.

9. The method of claim 6 wherein the first EDC data includes first run length data, first motion vector differential data, and first macroblock header data.

10. The method of claim 6 wherein the encoded video signal includes a plurality of video layers and the first EDC data includes slice header data corresponding to at least one of the plurality of video layers.

11. The method of claim 6 wherein the encoded video signal is encoded in accordance with at least one of an H.264 encoding standard and a video coding 1 (VC-1) encoding standard.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jul 6, 2023
From: COMERICA BANK
To: VIXS SYSTEMS, INC.
Reel/Frame 064224/0885 →
SECURITY INTEREST Recorded Jul 18, 2016
From: VIXS SYSTEMS INC.
To: COMERICA BANK
Reel/Frame 039380/0479 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2011
From: WANG, LIMIN (BOB); WANG, ZHONG YAN (JASON)
To: VIXS SYSTEMS, INC.
Reel/Frame 026059/0829 →