Quadrature communications device with power combiner and related methods

1. A communications device comprising:

a plurality of In-phase (I) power amplifiers configured to generate a plurality of I amplified signals;

a plurality of Quadrature (Q) power amplifiers configured to generate a plurality of Q amplified signals;

a first phase shifter coupled upstream of said plurality of I power amplifiers;

a second phase shifter coupled upstream of said plurality of Q power amplifiers;

an I controller coupled to said plurality of I power amplifiers and configured to selectively enable at least one of said plurality of I power amplifiers based upon at least a selected output power and to control said plurality of I power amplifiers to modulate and mix an I carrier signal directly received from said first phase shifter with an I digital baseband signal to generate the plurality of I amplified signals;

a Q controller coupled to said plurality of Q power amplifiers and configured to selectively enable at least one of said plurality of Q power amplifiers based upon at least a selected output power and to control said plurality of Q power amplifiers to modulate and mix a Q carrier signal directly received from said second phase shifter with a Q digital baseband signal to generate the plurality of Q amplified signals;

a power combiner configured to combine the plurality of I amplified signals and the plurality of Q amplified signals in a combined amplified signal; and

an antenna coupled to said power combiner.

2. The communications device of claim 1 further comprising an I digital-to-analog converter (DAC) configured to generate an I bias current signal for said plurality of I power amplifiers, and a Q DAC configured to generate a Q bias current signal for said plurality of Q power amplifiers.

3. The communications device of claim 2 further comprising an I look-up table (LUT) module upstream of said I DAC and configured to supply a linear I signal thereto, and a Q LUT module upstream of said Q DAC and configured to supply a linear Q signal thereto.

4. The communications device of claim 1 further comprising a phase locked loop (PLL) configured to generate the I and Q carrier signals.

5. The communications device of claim 4 wherein said PLL is configured to generate the I and Q carrier signals comprising constant envelop I and Q carrier signals.

6. A communications device comprising:

a plurality of In-phase (I) pre-amplifiers configured to generate a plurality of I amplified signals;

a plurality of Quadrature (Q) pre-amplifiers configured to generate a plurality of Q amplified signals;

a first phase shifter coupled upstream of said plurality of I pre-amplifiers;

a second phase shifter coupled upstream of said plurality of Q pre-amplifiers;

an I controller coupled to said plurality of I pre-amplifiers and configured to selectively enable at least one of said plurality of I pre-amplifiers based upon at least a selected output power and to control said plurality of I pre-amplifiers to modulate and mix an I carrier signal directly received from said first phase shifter with an I digital baseband signal to generate the plurality of I amplified signals;

a Q controller coupled to said plurality of Q pre-amplifiers and configured to selectively enable at least one of said plurality of Q pre-amplifiers based upon at least a selected output power and to control said plurality of Q pre-amplifiers to modulate and mix a Q carrier signal directly received from said second phase shifter with a Q digital baseband signal to generate the plurality of Q amplified signals;

a phase locked loop (PLL) configured to generate the I and Q carrier signals for said pluralities of I and Q pre-amplifiers;

a power combiner configured to combine the plurality of I amplified signals and the plurality of Q amplified signals in a combined amplified signal; and

an antenna coupled to said power combiner.

7. The communications device of claim 6 further comprising an I digital-to-analog converter (DAC) configured to generate an I bias current signal for said plurality of I pre-amplifiers, and a Q DAC configured to generate a Q bias current signal for said plurality of Q pre-amplifiers.

8. The communications device of claim 7 further comprising an I look-up table (LUT) module upstream of said I DAC and configured to supply a linear I signal thereto, and a Q LUT module upstream of said Q DAC and configured to supply a linear Q signal thereto.

9. The communications device of claim 6 wherein said PLL is configured to generate the I and Q carrier signals comprising constant envelop I and Q carrier signals.

10. A method of operating a communications device comprising:

using a plurality of In-phase (I) power amplifiers to generate a plurality of I amplified signals;

using a plurality of Quadrature (Q) power amplifiers to generate a plurality of Q amplified signals;

using an I controller to selectively enable at least one of the plurality of I power amplifiers based upon at least a selected output power and to control the plurality of I power amplifiers to modulate and mix an I carrier signal directly received from a first phase shifter with an I digital baseband signal to generate the plurality of I amplified signals;

using a Q controller to selectively enable at least one of the plurality of Q power amplifiers based upon at least a selected output power and to control said plurality of Q power amplifiers to modulate and mix a Q carrier signal directly received from a second phase shifter with a Q digital baseband signal to generate the plurality of Q amplified signals;

using a power combiner to combine the plurality of I amplified signals and the plurality of Q amplified signals in a combined amplified signal; and

using an antenna to transmit the combined amplified signal.

11. The method of claim 10 further comprising using an I digital-to-analog converter (DAC) to generate an I bias current signal for the plurality of I power amplifiers, and using a Q DAC to generate a Q bias current signal for the plurality of Q power amplifiers.

12. The method of claim 11 further comprising using an I look-up table (LUT) module upstream of the I DAC to supply a linear I signal thereto, and a Q LUT module upstream of the Q DAC to supply a linear Q signal thereto.