Semiconductor device and method for fabricating the same
View Patent ↗In a method for fabricating a semiconductor device, first, a first metal interconnect is formed in an interconnect formation region, and a second metal interconnect is formed in a seal ring region. Subsequently, by chemical mechanical polishing or etching, the upper portions of the first metal interconnect and the second metal interconnect are recessed to form recesses. A second insulating film filling the recesses is then formed above a substrate, and the upper portion of the second insulating film is planarized. Next, a hole and a trench are formed to extend halfway through the second insulating film, and ashing and polymer removal are performed. Subsequently to this, the hole and the trench are allowed to reach the first metal interconnect and the second metal interconnect.
1. A method for fabricating a semiconductor device, comprising:
the step (a) of forming a first insulating film over a semiconductor substrate;
the step (b) of forming an interconnect layer in at least an upper portion of the first insulating film;
the step (c) of forming an oxidation-resistant conductor film covering the top of the interconnect layer;
the step (d) of forming a second insulating film on the first insulating film and the oxidation-resistant conductor film;
the step (e) of forming a third insulating film on the second insulating film;
the step (f) of removing, using a photoresist as a mask, portions of the third insulating film and the second insulating film located over the interconnect layer until the oxidation-resistant conductor film is exposed in one step; and
the step (g) of removing the photoresist.
2. The method of claim 1 ,
wherein in the step (c), plasma treatment, wet treatment, or ion implantation is performed to introduce nitrogen into an upper portion of the interconnect layer, thereby forming the oxidation-resistant conductor film.
3. The method of claim 1 ,
wherein in the step (c), a film containing nitrogen is deposited, as the oxidation-resistant conductor film, on the interconnect layer.
4. The method of claim 1 ,
wherein in the step (b), a first interconnect layer and a second interconnect layer are formed as the interconnect layer,
in the step (c), an oxidation-resistant conductor film is formed on the first interconnect layer and the second interconnect layer, and
in the step (f), portions of the third insulating film and the second insulating film located over the first interconnect layer are removed to form a trench, and portions of the third insulating film and the second insulating film located over the second interconnect layer are removed to form a hole.
5. The method of claim 1 , further comprising, prior to the step (a), the step (h) of forming an element in the semiconductor substrate,
wherein in the step (b), the interconnect layer is formed to be electrically connectable to the element.
6. A method for fabricating a semiconductor device, comprising:
the step (a) of forming a first insulating film over a semiconductor substrate;
the step (b) of forming a first interconnect layer and a second interconnect layer in at least an upper portion of the first insulating film;
the step (c) of forming an oxidation-resistant conductor film covering tops of the first interconnect layer and the second interconnect layer;
the step (d) of forming a second insulating film on the first insulating film and the oxidation-resistant conductor film;
the step (e) of forming a third insulating film on the second insulating film;
the step (f) of forming a trench pattern by removing portions of the third insulating film and the second insulating film located over the first interconnect layer, and forming a part of a hole pattern by removing portions of the third insulating film and the second insulating film located over the second interconnect layer; and
the step (g) of removing portions of the second insulating film located over the second interconnect layer until the hole pattern reaches the oxidation-resistant conductor film.
7. The method of claim 6 , wherein
in the step (f), when the trench pattern is formed, portions of the third insulating film and the second insulating film located over the first interconnect layer are removed until the oxidation-resistant conductor film is exposed in one step.