Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating the thin film transistor substrate
Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including a copper layer and a copper solid solution layer.
1. A thin film transistor substrate comprising:
a substrate;
a gate line disposed on the substrate;
a data line crossing the gate line; and
a thin film transistor connected to the gate line and the data line respectively;
wherein a gate electrode of the thin film transistor comprises a first layer comprising copper, and a second layer comprising copper solid solution, the copper solid solution comprising copper and oxygen.
2. The thin film transistor substrate of claim 1 , wherein the second layer is disposed between the substrate and the first layer.
3. The thin film transistor substrate of claim 2 , wherein source and drain electrodes of the thin film transistor comprise a fourth layer comprising copper, and a fifth layer comprising copper solid solution, the copper solid solution comprising copper and oxygen.
4. The thin film transistor substrate of claim 3 , wherein the fifth layer is disposed between the substrate and the fourth layer.
5. The thin film transistor substrate of claim 1 , wherein the first layer is disposed between the substrate and the second layer.
6. The thin film transistor substrate of claim 5 , wherein source and drain electrodes of the thin film transistor comprise a fourth layer comprising copper, and a fifth layer comprising copper solid solution, the copper solid solution comprising copper and oxygen.
7. The thin film transistor substrate of claim 6 , wherein the fourth layer is disposed between the substrate and the fifth layer.
8. A thin film transistor substrate comprising:
a substrate;
a gate line disposed on the substrate;
a data line crossing the gate line; and
a thin film transistor connected to the gate line and the data line respectively;
wherein a gate electrode of the thin film transistor comprises a first layer comprising copper, and a second layer comprising copper solid solution, the copper solid solution comprising copper, oxygen, and nitrogen.
9. The thin film transistor substrate of claim 8 , wherein the second layer is disposed between the substrate and the first layer.
10. The thin film transistor substrate of claim 9 , wherein source and drain electrodes of the thin film transistor comprise a fourth layer comprising copper, and a fifth layer comprising copper solid solution, the copper solid solution comprising copper, oxygen, and nitrogen.
11. The thin film transistor substrate of claim 10 , wherein the fifth layer is disposed between the substrate and the fourth layer.
12. The thin film transistor substrate of claim 8 , wherein the first layer is disposed between the substrate and the second layer.
13. The thin film transistor substrate of claim 12 , wherein source and drain electrodes of the thin film transistor comprise a fourth layer comprising copper, and a fifth layer comprising copper solid solution, the copper solid solution comprising copper, oxygen, nitrogen.
14. The thin film transistor substrate of claim 13 , wherein the fourth layer is disposed between the substrate and the fifth layer.
15. A thin film transistor substrate comprising:
a substrate;
a gate line disposed on the substrate;
a data line crossing the gate line; and
a thin film transistor connected to the gate line and the data line respectively;
wherein a gate electrode of the thin film transistor comprises first and second layers comprising copper solid solution, and a third layer comprising copper, the copper solid solution comprising copper and oxygen.
16. The thin film transistor substrate of claim 15 , wherein the third layer is disposed between the first layer and the second layer.
17. The thin film transistor substrate of claim 16 , wherein source and drain electrodes of the thin film transistor comprises fourth and fifth layers comprising copper solid solution, and a sixth layer comprising copper, the copper solid solution comprising copper and oxygen.
18. The thin film transistor substrate of claim 17 , wherein the sixth layer disposed between the fourth layer and the fifth layer.
19. The thin film transistor substrate of claim 18 , further comprising an insulating layer disposed between the gate electrode and the source and drain electrodes, the insulating layer comprising silicon and at least one of oxygen and nitrogen.
20. The thin film transistor substrate of claim 18 , further comprising an insulating layer covering the source and drain electrodes, the insulating layer comprising silicon and at least one of oxygen and nitrogen.
21. A thin film transistor substrate comprising:
a substrate;
a gate line disposed on the substrate;
a data line crossing the gate line; and
a thin film transistor connected to the gate line and the data line respectively;
wherein a gate electrode of the thin film transistor comprises first and second layers comprising copper solid solution, and a third layer comprising copper, the copper solid solution comprising copper, oxygen, and nitrogen.
22. The thin film transistor substrate of claim 21 , wherein the third layer is disposed between the first layer and the second layer.
23. The thin film transistor substrate of claim 22 , wherein source and drain electrodes of the thin film transistor comprises fourth and fifth layers comprising copper solid solution, and a sixth layer comprising copper, the copper solid solution comprising copper, oxygen, nitrogen.
24. The thin film transistor substrate of claim 23 , wherein the sixth layer is disposed between the fourth layer and the fifth layer.
25. The thin film transistor substrate of claim 24 , further comprising an insulating layer disposed between the gate electrode and the source and drain electrodes, the insulating layer comprising silicon and at least one of oxygen and nitrogen.
26. The thin film transistor substrate of claim 24 , further comprising an insulating layer covering the source and drain electrodes, the insulating layer comprising silicon and at least one of oxygen and nitrogen.