IP Library Granted Patent US 8,082,429
Granted Patent B2
US 8,082,429 · App. 13/052,281 · Granted Dec 20, 2011

Information processing apparatus and exception control circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,082,429
App. No.
13/052,281
Granted
Dec 20, 2011
Kind
B2
Abstract

An information processing apparatus performs switching between an exception handler and normal processing. The information processing apparatus includes a processor; a data processing unit that performs particular processing upon receiving a processing request from the processor; an interrupt controller that issues an interrupt request to the processor; and an exception control unit that controls the interrupt controller, wherein the data processing unit is connected with the exception control unit via a dedicated line. The data processing unit includes a notification unit that notifies, via the dedicated line, the exception control unit of status information indicating current status of the data processing unit, and based on the notified status information and setup information set by the processor, the exception control unit judges whether to cause the interrupt controller to issue an interrupt request to execute an exception handler to the processor.

Claims (20)

1. An information processing apparatus, comprising:

a processor;

at least one data processing unit operable to perform a particular processing upon receiving a processing request from the processor;

an exception control unit; and

a dedicated line that connects the data processing unit and the exception control unit, wherein

(i) when an instruction to read a result of the processing request is issued by the processor, the exception control unit judges whether to notify the processor of an interrupt request based on status information that changes in accordance with the processing request and indicates a current status of the data processing unit notified from the data processing unit via the dedicated line, and

(ii) when judging affirmatively, the exception control unit notifies the processor of the interrupt request.

2. An exception control circuit for use in an information processing apparatus, the information processing apparatus comprising:

a processor;

at least one data processing unit operable to perform a particular processing upon receiving a processing request from the processor; and

a dedicated line that connects the data processing unit and the exception control circuit, wherein

(i) when an instruction to read a result of the processing request is issued by the processor, the exception control circuit judges whether to notify the processor of an interrupt request based on status information that changes in accordance with the processing request and indicates a current status of the data processing unit notified from the data processing unit via the dedicated line, and

(ii) when judging affirmatively, the exception control circuit notifies the processor of the interrupt request.

3. An exception control method for use in an information processing apparatus, the information processing apparatus comprising:

a processor;

at least one data processing unit operable to perform a particular processing upon receiving a processing request from the processor;

an exception control unit; and

a dedicated line that connects the data processing unit and the exception control unit, wherein

(i) when an instruction to read a result of the processing request is issued by the processor, the exception control unit judges whether to notify the processor of an interrupt request based on status information that changes in accordance with the processing request and indicates a current status of the data processing unit notified from the data processing unit via the dedicated line, and

(ii) when judging affirmatively, the exception control unit notifies the processor of the interrupt request.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 28, 2015
From: PANASONIC CORPORATION
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 035510/0059 →