40 GIGABIT ATTACHMENT UNIT INTERFACE (XLAUI) LANE ELECTRICAL INTERFACE TO REPLACE 10 GIGABIT XFP (XFI) IN 10GB/S CHANNEL APPLICATIONS
The preferred device (e.g. printed circuit board or PCB) includes a XLAUI bi-directional lane link (i.e. ¼ XLAUI channel) inserted onto the printed circuit board between a PHY integrated circuit and an Ethernet media access control (MAC) processor. This XLAUI bi-directional lane link replaces the electrical XFI channel in 10 Gb/s interconnects between integrated circuits on a PCB. The preferred methodology includes inserting a bi-directional 10 Gb/s XLAUI lane link onto a printed circuit board for use in 10 Gb/s interconnects between a PHY integrated circuit and a MAC processor.
1 . A device for use in 10 Gb/s channel applications comprising:
(a) a PHY integrated circuit;
(b) an Ethernet media access control (MAC) processor; and
(c) a XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor.
2 . The device of claim 1 wherein the device is a printed circuit board.
3 . The device of claim 2 wherein the printed circuit board is a FR408 printed circuit board.
4 . The device of claim 1 wherein the XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor is greater than 7.5 inches in length.
5 . The device of claim 1 wherein the XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor is greater than 7.5 inches in length but less than fourteen (14) inches in length.
6 . A method of manufacturing a device for use in 10 Gb/s channel applications comprising the steps of:
(a) inserting a PHY integrated circuit onto the device;
(b) inserting an Ethernet media access control (MAC) processor onto the device; and
(c) inserting a XLAUI 10 Gb/s bi-directional lane link onto the device between the PHY integrated circuit and the Ethernet MAC processor.
7 . The method of claim 6 wherein the device is a printed circuit board.
8 . The method of claim 7 wherein the printed circuit board is a FR408 printed circuit board.
9 . The method of claim 6 wherein the XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor is greater than 7.5 inches in length.
10 . The method of claim 6 wherein the XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor is less than fourteen (14) inches in length.
11 . A method of using a device in 10 Gb/s channel applications comprising the steps of:
(a) utilizing a device having a PHY integrated circuit and an Ethernet media access control (MAC) processor; and
(b) utilizing a XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor.
12 . The method of claim 11 wherein the device is a printed circuit board.
13 . The method of claim 12 wherein the printed circuit board is a FR408 printed circuit board.
14 . The method of claim 11 wherein the XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor is greater than 7.5 inches in length.
15 . The method of claim 11 wherein the XLAUI 10 Gb/s bi-directional lane link between the PHY integrated circuit and the Ethernet MAC processor is less than fourteen (14) inches in length.