Thin-film transistor, method of manufacturing the same, and display device
View Patent ↗A thin film transistor is provided. The thin film transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel region wherein a portion of the source and drain regions has an oxygen concentration less than the channel region. Further provided is a thin film transistor that includes an oxide semiconductor layer including a source region, a drain region, and a channel region, wherein a portion of the source and drain regions includes a dopant selected from the group consisting of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, lead, and combinations thereof.
1. A thin film transistor comprising:
an oxide semiconductor layer including a source region, a drain region, and a channel region;
a gate electrode formed on a first side of the oxide semiconductor layer; and
a high-resistance material layer,
wherein each of the source and drain regions of the oxide semiconductor layer include a low-resistance region having a lower resistance than that of the channel region, and
wherein the high-resistance material layer is formed on and directly contacts the gate electrode and the low-resistant regions of the oxide semiconductor layer.
2. The thin film transistor of claim 1 , wherein the low-resistance region has a thickness of at least 10 nm in the depth direction from the upper face thereof.
3. The thin film transistor of claim 1 , wherein the high-resistance material layer is selected from the group consisting of titanium oxide, aluminum oxide, and indium oxide.
4. The thin film transistor of claim 1 , wherein the high-resistance material layer includes a plurality of island-shaped metal films.
5. The thin film transistor of claim 4 , wherein the island-shaped metal films are spaced apart so as to provide a clearance gap.
6. The thin film transistor of claim 5 , wherein the portion of the source and drain regions is a low-resistance region extending in a depth direction from an upper face thereof, and wherein a first portion of the island-shaped metal films is in contact with the low resistance region and a second portion of the island-shaped metal films is in contact with a gate electrode.
7. The thin film transistor of claim 1 , further including an insulating layer.
8. The thin film transistor of claim 1 , further including a source electrode and a drain electrode.
9. The thin film transistor of claim 1 , wherein the high-resistance material layer is formed in the source region, the drain region, and the channel region.