LDMOS having a field plate
View Patent ↗Laterally diffused metal oxide semiconductor transistor for a radio frequency-power: amplifier comprising a drain finger ( 25,27 ) which drain finger is connected to a stack of one or more metal interconnect layers, ( 123,61,59,125 ) wherein a metal interconnect layer ( 123 ) of said stack is connected to a drain region ( 25 ) on the substrate, wherein said stack comprises a field plate ( 123, 125, 121 ) adapted to reduce the maximum magnitude of the electric field between the drain and the substrate and overlying the tip of said drain finger.
1. A laterally diffused metal oxide semiconductor transistor for a radio frequency power amplifier comprising:
a substrate having a drain region; and
a drain finger comprising
a stack of at least one metal interconnect layer and
a tip, wherein a metal interconnect layer of the stack of the at least one metal interconnect layer is connected to the drain region on the substrate, and the tip of the drain finger includes a field plate that reduces a maximum magnitude of an electric field between the drain region and the substrate.
2. The laterally diffused metal oxide semiconductor transistor according to claim 1 , wherein the field plate comprises a planar metal shield.
3. The laterally diffused metal oxide semiconductor transistor according to claim 2 , wherein the planar metal shield is on a metal interconnect layer in the stack of the at least one metal interconnect layer in the drain finger.
4. The laterally diffused metal oxide semiconductor transistor according to claim 2 , wherein the stack of the at least one metal interconnect layer is a mushroom stack of at least two metal interconnect layers and wherein a highest metal interconnect layer in the stack of the at least two metal interconnect layers in the drain finger extends over the planar metal shield.
5. The laterally diffused metal oxide semiconductor transistor according to claim 1 , wherein the field plate has a round edge at the tip of the drain finger.
6. The laterally diffused metal oxide semiconductor transistor according to claim 5 , wherein a tip of the field plate includes a drop-shaped horizontal projection at the tip of the drain finger.
7. The laterally diffused metal oxide semiconductor transistor according to claim 1 , wherein the tip of the drain finger includes a second field plate that reduces the maximum magnitude of the electric field between the drain region and the substrate.
8. The laterally diffused metal oxide semiconductor according to claim 7 , wherein the second field plate is isolated from the drain region in a vicinity of the tip of the drain finger.
9. The laterally diffused metal oxide semiconductor transistor according to claim 7 , wherein the second field plate comprises a second planar metal shield.
10. The laterally diffused metal oxide semiconductor transistor according to claim 9 , wherein the second planar metal shield is arranged between a lowest metal interconnect layer of the stack of metal interconnect layers comprised in the drain finger and an epitaxial layer and is separated from the lowest metal interconnect layer by a layer of oxide.
11. The laterally diffused metal oxide semiconductor transistor according to claim 7 , wherein the second field plate contains tungsten.
12. A power amplifier comprising the laterally diffused metal oxide semiconductor transistor according to claim 1 .
13. A base station, comprising the laterally diffused metal oxide semiconductor transistor according to claim 1 .
14. The laterally diffused metal oxide semiconductor transistor according to claim 1 , wherein the tip of the drain finger is cone shaped.
15. The laterally diffused metal oxide semiconductor transistor according to claim 1 , wherein a breakdown at the tip of the drain finger occurs only at a substantially identical voltage as a breakdown along all of the drain finger.