Frame signal generating method and frame signal generating device
A method for generating a frame signal includes monitoring a first frame signal and obtaining a first parameter based on the monitoring result; setting a second parameter based on the type of the first frame signal; when the first frame signal is being input, generating a second frame signal with a bit rate different from that of the first frame signal by determining data and stuff byte positions based on the first parameter and performing frame processing on data and stuff bytes corresponding to the first frame signal based on the determined data and stuff byte positions; and when the first frame signal is not being input, generating the second frame signal by determining the data and stuff byte positions based on the second parameter and performing the frame processing on data and stuff bytes corresponding to a maintenance signal based on the determined data and stuff byte positions.
1. A method for generating a frame signal performed by a network device, the method comprising:
monitoring a first frame signal input to the network device and obtaining a first parameter based on the monitoring result;
setting a second parameter based on a type of the first frame signal;
when the first frame signal is being input to the network device, generating a second frame signal with a bit rate that is different from a bit rate of the first frame signal by determining data and stuff byte positions for frame processing based on the first parameter and by performing the frame processing on data and stuff bytes corresponding to the first frame signal based on the determined data and stuff byte positions; and
when the first frame signal is not being input to the network device, generating the second frame signal without using any oscillator by determining the data and stuff byte positions for the frame processing based on the second parameter and by performing the frame processing on data and stuff bytes corresponding to a maintenance signal based on the determined data and stuff byte positions.
2. The method as claimed in claim 1 , wherein
the frame processing is a mapping process according to a generic mapping procedure;
the first parameter is obtained based on a count of a number of data entities of the first frame signal in one multiframe period of the second frame signal; and
the second parameter is calculated based on the type of the first frame signal.
3. The method as claimed in claim 1 , wherein
the frame processing is a demapping process according to a generic mapping procedure;
the first parameter is obtained based on overhead information of the first frame signal; and
the second parameter is calculated based on the type of the first frame signal.
4. The method as claimed in claim 1 , wherein
the frame processing is a mapping process according to an asynchronous mapping procedure;
the first parameter is a value JC indicating seventh and eighth bits of a justification control (JC) byte in the asynchronous mapping procedure and is obtained based on a count of a number of data entities of the first frame signal in one multiframe period of the second frame signal; and
the second parameter is a value JC indicating the seventh and eighth bits of the justification control (JC) byte in the asynchronous mapping procedure and is calculated based on the type of the first frame signal.
5. The method as claimed in claim 1 , wherein
the frame processing is a demapping process according to an asynchronous mapping procedure;
the first parameter is a value JC indicating seventh and eighth bits of a justification control (JC) byte in the asynchronous mapping procedure and is obtained based on overhead information of the first frame signal; and
the second parameter is a value JC indicating the seventh and eighth bits of the justification control (JC) byte in the asynchronous mapping procedure and is calculated based on the type of the first frame signal.
6. A device for generating a frame signal, the device comprising:
a parameter obtain circuit configured to obtain a first parameter based on a first frame signal input to the device; and
a frame process circuit, wherein
when the first frame signal is being input to the device, the frame process circuit is configured to generate a second frame signal with a bit rate that is different from a bit rate of the first frame signal by determining data and stuff byte positions for frame processing based on the first parameter and by performing the frame processing on data and stuff bytes corresponding to the first frame signal based on the determined data and stuff byte positions; and
when the first frame signal is not being input to the device, the frame process circuit is configured to generate the second frame signal without using any oscillator by determining the data and stuff byte positions for the frame processing based on a type of the first frame signal and by performing the frame processing on data and stuff bytes corresponding to a maintenance signal based on the determined data and stuff byte positions.
7. The device as claimed in claim 6 , further comprising:
a parameter set circuit configured to calculate a second parameter based on the type of the first frame signal, wherein
the frame process circuit is configured to perform a mapping process according to a generic mapping procedure; and
the parameter obtain circuit is configured to obtain as the first parameter based on a count of a number of data entities of the first frame signal in one multiframe period of the second frame signal.
8. The device as claimed in claim 6 , wherein
the frame process circuit is configured to perform a demapping process according to a generic mapping procedure;
the parameter obtain circuit is configured to obtain the first parameter based on overhead information of the first frame signal; and
the parameter set circuit is configured to calculate the second parameter based on the type of the first frame signal.
9. The device as claimed in claim 6 , wherein
the frame process circuit is configured to perform a mapping process according to an asynchronous mapping procedure;
the parameter obtain circuit is configured to obtain a value JC indicating seventh and eighth bits of a justification control (JC) byte in the asynchronous mapping procedure as the first parameter based on a count of a number of data entities of the first frame signal in one multiframe period of the second frame signal; and
the parameter set circuit is configured to calculate a value JC indicating the seventh and eighth bits of the justification control (JC) byte in the asynchronous mapping procedure as the second parameter based on the type of the first frame signal.
10. The device as claimed in claim 6 , wherein
the frame process circuit is configured to perform a demapping process according to an asynchronous mapping procedure;
the parameter obtain circuit is configured to obtain a value JC indicating seventh and eighth bits of a justification control (JC) byte in the asynchronous mapping procedure as the first parameter based on overhead information of the first frame signal; and
the parameter set circuit is configured to calculate a value JC indicating the seventh and eighth bits of the justification control (JC) byte in the asynchronous mapping procedure as the second parameter based on the type of the first frame signal.
11. The device as claimed in claim 6 , wherein the frame process circuit includes
a data storage configured to store the first frame signal;
a parameter selector configured
to receive the first parameter and the second parameter,
to output the first parameter in a normal mode where the first frame signal is being input to the device, and
to output the second parameter in a maintenance mode where the first frame signal is not being input to the device;
a calculation circuit configured
to determine the data and stuff byte positions in the second frame signal based on one of the first parameter and the second parameter output from the parameter selector,
to generate a read enable signal for controlling timing of outputting data from the data storage, and
to output the read enable signal to the data storage in the normal mode;
a data generation circuit configured to generate the maintenance signal according to the read enable signal output from the calculation circuit in the maintenance mode; and
a data selector configured
to receive a data signal output from the data storage and a data signal output from the data generation circuit,
to output the data signal received from the data storage in the normal mode, and
to output the data signal received from the data generation circuit in the maintenance mode.
12. The device as claimed in claim 6 , wherein the parameter set circuit is configured to determine the type of the first frame signal based on information sent from a network management system.
13. The device as claimed in claim 6 , wherein the parameter set circuit is configured to determine the type of the first frame signal based on a payload type and a multiplex structure identifier in an overhead of a third frame signal containing the first frame signal.