Differential amplifier and method for the operation of a differential amplifier

1. A differential amplifier comprising:

a first amplifier with a signal input and a signal output that is fed back to a first feedback input of the first amplifier and is connected to a first output of the differential amplifier;

a buffer circuit that is connected to the first output; and

a nonlinear resistor circuit that is coupled via a first output node to the first output and via a second output node to the buffer circuit,

wherein the nonlinear resistor circuit comprises a first component that comprises a first resistor and a first transistor that are connected to each other in parallel and are coupled, on one hand, to the first output node and, on the other hand, via a second resistor to the second output node and a bias current can be fed to the control side of the first transistor for controlling the component.

2. The differential amplifier according to claim 1 , wherein the buffer circuit comprises:

a second amplifier with a reference input and a reference output that is fed back to a second feedback input of the second amplifier and is connected to a second output of the differential amplifier; and

the nonlinear resistor circuit is coupled via the second output node to the second output and is connected to the first feedback input and to the second feedback input.

3. The differential amplifier according to claim 1 , wherein the nonlinear resistor circuit comprises a second component such that:

a second transistor is connected parallel to the first resistor connected in series and second resistor;

the second resistor is coupled via a third resistor to the second output node; and

the bias current can be fed to the control side of the second transistor for the control of the second component.

4. The differential amplifier according to claim 1 , wherein the nonlinear resistor circuit comprises a number n of components such that:

each (n−1)-th transistor is connected parallel to a series circuit made from n−1 resistors,

each (n−1)-th resistor (Rn−1) is coupled via an n-th resistor (Rn) with the second output node, and

the bias current can be fed to the control side of the (n−1)-th transistor for the control of the n-th component.

5. The differential amplifier according to claim 1 , wherein a reference transistor is connected to the first amplifier output or to the first output node and the bias current can be fed to its control side and load side.

6. The differential amplifier according to claim 1 , that comprises an adjustment circuit that adjusts the bias current such that process and temperature variations of the nonlinear resistor circuit are compensated continuously.

7. The differential amplifier according to claim 6 , wherein the adjustment circuit comprises:

an auxiliary amplifier with a first input, a second input, and a reference output;

a first reference current source that is connected to the first input and a second reference current source that is connected to the second input and each of which can be connected to a supply voltage;

a reference resistor that is connected to the first input and a reference voltage;

a first transistor that is coupled via its load side with the reference voltage and the second input and is connected via its control side to the reference output; and

a second transistor that is coupled via its load side with the reference voltage and with a current mirror that generates the bias current and is connected via its control side to the reference output.

8. The differential amplifier according to claim 2 , wherein the first amplifier output and the second amplifier output are combined by a converter circuit into a combined output and the combined output is connected to the reference input of the second amplifier.

9. The differential amplifier according to claim 1 , wherein a filter is coupled between the first output and the buffer circuit.

10. The differential amplifier according to claim 1 , wherein all or some of the transistors are constructed as unipolar transistors.