IP Library Granted Patent US 8,637,981
Granted Patent B2
US 8,637,981 · App. 13/075,597 · Granted Jan 28, 2014

Dual compartment semiconductor package with temperature sensor

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Quick Facts
Patent No.
US 8,637,981
App. No.
13/075,597
Granted
Jan 28, 2014
Kind
B2
Abstract

According to an exemplary embodiment, a dual compartment semiconductor package includes a conductive clip having first and second compartments. The first compartment is electrically and mechanically connected to a top surface of the first die. The second compartment electrically and mechanically connected to a top surface of a second die. The dual compartment semiconductor package also includes a groove formed between the first and second compartments, the groove preventing contact between the first and second dies. The dual compartment package electrically connects the top surface of the first die to the top surface of the second die. The first die can include an insulated-gate bipolar transistor (IGBT) and the second die can include a diode. A temperature sensor can be situated adjacent to, over, or within the groove for measuring a temperature of the dual compartment semiconductor package.

Claims (15)

1. A dual compartment semiconductor package comprising:

a conductive clip having first and second compartments;

said first compartment electrically and mechanically connected to a top surface of a first die;

said second compartment,electrically and mechanically connected to a top surface of a second die;

a groove formed between said first and second compartments and including a contact portion, said groove preventing contact between said first and second dies;

said dual compartment package electrically connecting said top surface of said first die and to said top surface of said second die.

2. The dual compartment semiconductor package of claim 1 , wherein said first die comprises an insulated-gate bipolar transistor (IGBT).

3. The dual compartment semiconductor package of claim 1 , wherein said second die comprises a diode.

4. The dual compartment semiconductor package of claim 1 , wherein said first die comprises an IGBT and said second die comprises a diode.

5. The dual compartment semiconductor package of claim 1 , wherein said first die comprises an IGBT, a collector electrode of said IGBT on said top surface of said first die and a gate electrode and an emitter electrode of said IGBT on a bottom surface of said first die.

6. The dual compartment semiconductor package of claim 1 , wherein said first die comprises an IGBT and said second die comprises a diode, a collector of said IGBT electrically connected to said first compartment through said top surface of said first die, a cathode of said diode electrically connected to said second compartment through said top surface of said second die.

7. The dual compartment semiconductor package of claim 1 , wherein said contact portion is configured to connect to a substrate.

8. The dual compartment semiconductor package of claim 1 , comprising a heat sink over said groove.

9. The dual compartment semiconductor package of claim 1 , comprising a heat sink thermally connected to said first and second compartments.

10. The dual compartment semiconductor package of claim 1 , wherein a top surface of said first compartment is coplanar with a top surface of said second compartment.

Assignments (2)
CHANGE OF NAME Recorded Jul 23, 2018
From: INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 046612/0968 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2011
From: HAUENSTEIN, HENNING M.
To: INTERNATIONAL RECTIFIER CORPORATION
Reel/Frame 026049/0763 →