IP Library Granted Patent US 8,526,441
Granted Patent B2
US 8,526,441 · App. 13/085,597 · Granted Sep 3, 2013

System and method for handling out-of-order frames

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Quick Facts
Patent No.
US 8,526,441
App. No.
13/085,597
Granted
Sep 3, 2013
Kind
B2
Abstract

A system for reordering frames may include at least one processor that enable receiving of an out-of-order frame via a network subsystem. The at least one processor may enable placing data of the out-of-order frame in a host memory, and managing information relating to one or more holes resulting from the out-of-order frame in a receive window. The at least one processor may enable setting a programmable limit with respect to a number of holes allowed in the receive window. The out-of-order frame is received via a TCP offload engine (TOE) of the network subsystem or a TCP-enabled Ethernet controller (TEEC) of the network subsystem. The network subsystem may not store the out-of-order frame on an onboard memory, and may not store one or more missing frames relating to the out-of-order frame. The network subsystem may include a network interface card (NIC).

Claims (29)

1. A system for reordering frames in a network, the system comprising:

at least one processor operable to place data from a frame into a host memory window, wherein the frame is at least an out-of-order frame or fills a hole in the host memory window; and

the at least one processor is operable to modify a size of the host memory window, a number of holes allowed in the host memory window, and a size of each hole.

2. The system according to claim 1 , wherein the frame is received via a TCP offload engine (TOE) or a TCP-enabled Ethernet controller (TEEC).

3. The system according to claim 1 , wherein the at least one processor is operable to not store the frame on an onboard memory if it is received out-of-order.

4. The system according to claim 3 , wherein the at least one processor is operable to not store the frame on the onboard memory if it fills a hole in the host memory window.

5. The system according to claim 1 , wherein the at least one processor is on a network interface card (NIC).

6. The system according to claim 1 , wherein the at least one processor is operable to place data from the frame into the host memory window if the frame is determined to be within limits of the host memory window.

7. The system according to claim 1 , wherein the at least one processor is operable to drop the frame, if the frame is determined to be outside limits of the host memory window.

8. The system according to claim 1 , wherein the at least one processor is operable to place a portion of the data of the frame in the host memory window, wherein the portion of the data is within limits of the host memory window.

9. The system according to claim 1 , wherein the at least one processor enables at least one of: storing information relating to a new hole created by placement of the data of the frame, updating information relating to an existing hole modified by placement of the data of the frame, or deleting information relating to a plugged hole created by placement of the data of the frame.

10. The system according to claim 9 , wherein the stored information resides on a network subsystem, wherein the updated information resides on a network subsystem, and wherein the deleted information resided on a network subsystem.

11. The system according to claim 9 , wherein the information resides on a network subsystem.

12. The system according to claim 1 , wherein the at least one processor is operable to update a size of the host memory window based upon placement of the data of the frame.

13. The system according to claim 1 , wherein the at least one processor is operable to map TCP space into host buffer space.

14. The system according to claim 1 , wherein a network subsystem comprises a memory whose memory usage scales with a number of holes in the host memory window.

15. The system according to claim 1 , wherein a network subsystem comprises a memory whose memory usage does not scale with a number of frames received.

16. A method for reordering frames in a network, the method comprising:

placing data from a frame into a host memory window, wherein the frame is at least an out-of-order frame or fills a hole in the host memory window; and

managing information relating to holes in the host memory window, wherein managing comprises modifying a size of the host memory window, a number of holes allowed in the host memory window, and a size of each hole.

17. The method according to claim 16 , wherein the method comprises determining whether the frame is within limits of the host memory window prior to placing data from the frame into the host memory window.

18. The method according to claim 16 , wherein the method comprises dropping the frame, if the frame is determined to be outside limits of the host memory window.

19. The method according to claim 16 , wherein the method comprises determining whether a portion of the frame is within limits of the host memory window prior to placing data from the frame into the host memory window.

20. The method according to claim 16 , wherein managing information relating to holes comprises at least one of: storing information relating to a new hole created by placement of the data of the frame, updating information relating to an existing hole modified by placement of the data of the frame, or deleting information relating to a plugged hole created by placement of the data of the frame.

21. The method according to claim 16 , wherein managing information relating to holes comprises updating a size of the host memory window based upon placement of the data of the frame.

22. The method according to claim 16 , wherein the method comprises mapping TCP space into host buffer space.

23. A method for reordering frames in a network, the method comprising:

placing data from a frame into a host memory window, wherein the frame is, at least, an out-of-order frame or fills a hole in the host memory window; and

modifying a size of the host memory window, a number of holes allowed in the host memory window, and a size of each hole.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2013
From: ELZUR, URI
To: BROADCOM CORPORATION
Reel/Frame 030933/0240 →