IP Library Granted Patent US 8,305,132
Granted Patent B2
US 8,305,132 · App. 13/089,185 · Granted Nov 6, 2012

Low-pass filter with adjustable cut-off frequency

Assignee: STMicroelectronics SA
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Quick Facts
Patent No.
US 8,305,132
App. No.
13/089,185
Granted
Nov 6, 2012
Kind
B2
Abstract

A low-pass filter includes an integrator having an adjustable unity frequency. The integrator includes a first input, first output and feedback loop between the first input and output of the integrator. The first input is connected to a branch that includes a first impedance, to which is applied a first input voltage of the low-pass filter. The feedback loop includes a second impedance and the first output of the integrator is the first output of the low-pass filter.

Claims (58)

1. A low-pass filter, comprising:

a first input terminal configured to receive a first input voltage;

a first impedance coupled to the first input terminal;

an output terminal; and

an integrator having an adjustable unity frequency, said integrator including:

a first input coupled to the first impedance such that the first impedance is positioned between the first input terminal and the first input of the integrator;

a first output coupled to the output terminal of the low-pass filter;

an input stage coupled to the first input and including a transconductor;

an output stage coupled to the output terminal;

a variable gain control stage electrically coupled between an output of the transconductor and an input of the output stage and configured to adjust the unity frequency of the integrator; and

a feedback loop between said first input and first output of said integrator, said feedback loop including a second impedance.

2. A low-pass filter according to claim 1 , wherein the variable gain control stage is configured to allow the unity frequency of said integrator to be adjusted.

3. A low-pass filter according to claim 2 , wherein the variable gain control stage has a gain that is variable from a value α min to a value α max , with 1≦α max /α min ≦25.

4. A low-pass filter according to claim 1 , wherein the integrator comprises a second input and a second output, said second input and second output being coupled to ground.

5. A low-pass filter according to claim 1 , further comprising:

a second input terminal configured to receive a second input voltage;

a second output terminal; and

a third impedance coupled to the second input terminal, wherein the integrator comprises:

a second input coupled to the third impedance such that the third impedance is positioned between the second input terminal and the second input of the integrator;

a second output, coupled to the second output terminal of the low-pass filter; and

a second feedback loop between said second input and output of said integrator, said second feedback loop including a fourth impedance.

6. A low-pass filter according to claim 1 , wherein the first and second impedances are chosen such that 0.5≦Z 2 /Z 1 ≦5, with Z 1 and Z 2 being values of the first and second impedances, respectively.

7. A low-pass filter according to claim 1 , wherein the low-pass filter is of an order greater than or equal to 2.

8. A low-pass filter according to claim 1 , wherein the low-pass filter has a leapfrog cascade structure of plural low-pass filter circuits, wherein one of the low-pass filter circuits includes a first impedance and the integrator.

9. A system for processing an electrical signal comprising:

a first low-pass filter stage that includes:

a first input terminal configured to receive a first input voltage;

a first impedance coupled to the first input terminal;

a first output terminal configured to provide a first output signal; and

a first integrator having an adjustable unity frequency, said integrator including:

a first input coupled to the first impedance such that the first impedance is positioned between the first input terminal and the first input of the integrator;

a first output coupled to the first output terminal of the first low-pass filter stage;

an input stage coupled to the first input and including a transconductor;

an output stage coupled to the output terminal;

a variable gain control stage electrically coupled between an output of the transconductor and an input of the output stage and configured to adjust the unity frequency of the integrator; and

a first feedback loop between said first input and first output of said integrator, said first feedback loop including a second impedance.

10. A system according to claim 9 , comprising:

a second low-pass filter stage coupled to the first low-pass filter stage in a leapfrog configuration.

11. A system according to claim 10 , wherein the first low-pass filter stage includes a second input terminal and the second low-pass filter stage includes:

a third input terminal configured to receive the first output signal;

a third impedance coupled to the third input terminal;

a second output terminal configured to provide a second output signal; and

a second integrator having an adjustable unity frequency, said second integrator including:

a first input coupled to the third impedance such that the third impedance is positioned between the third input terminal and the first input of the second integrator;

a first output coupled to the second output terminal of the second low-pass filter stage; and

a second feedback loop between said first input and first output of said integrator, said second feedback loop including a fourth impedance.

12. A system according to claim 9 , wherein the variable gain control stage is configured to adjust the unity frequency of said first integrator.

13. A system according to claim 12 , wherein the variable gain control stage has a gain that is variable from a value α min to a value α max , with 1≦α max /α min ≦25.

14. A system according to claim 9 , wherein the first integrator comprises a second input and a second output, said second input and second output being coupled to ground.

15. A system according to claim 9 , further comprising:

a second input terminal configured to receive a second input voltage;

a second output terminal; and

a third impedance coupled to the second input terminal, wherein the integrator comprises:

a second input coupled to the third impedance such that the third impedance is positioned between the second input terminal and the second input of the integrator;

a second output, coupled to the second output terminal of the low-pass filter; and

a second feedback loop between said second input and output of said integrator, said second feedback loop including a fourth impedance.

16. A system according to claim 9 , wherein the first and second impedances are chosen such that 0.5≦Z 2 /Z 1 ≦5, with Z 1 and Z 2 being values of the first and second impedances, respectively.

17. A system according to claim 9 , wherein the low-pass filter is of an order greater than or equal to 2.

Assignments (2)
CHANGE OF NAME Recorded Jan 31, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066382/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2011
From: BLANC, JEAN-PIERRE
To: STMICROELECTRONICS SA
Reel/Frame 026637/0199 →
Priority Claims (1)
FR 10 53023 · Apr 20, 2010 · national
Continuity (1)
Related Publication 20110279196A1 · Nov 17, 2011