IP Library Granted Patent US 8,673,697
Granted Patent B2
US 8,673,697 · App. 13/100,979 · Granted Mar 18, 2014

Thin film transistor, method of fabricating the same and organic light emitting diode display device having the same

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Quick Facts
Patent No.
US 8,673,697
App. No.
13/100,979
Granted
Mar 18, 2014
Kind
B2
Abstract

A method of fabricating a thin film transistor, comprising steps of preparing a substrate; forming a polycrystalline silicon layer on the substrate; injecting impurities into the polycrystalline silicon layer for channel doping; patterning the polycrystalline silicon layer and forming a semiconductor layer; annealing the semiconductor layer in an H 2 O atmosphere, and forming a thermal oxide layer on the semiconductor layer; forming a silicon nitride layer on the thermal oxide layer; forming a gate electrode at a location corresponding to a predetermined region of the semiconductor layer; forming an interlayer insulating layer on the entire surface of the substrate; and forming source and drain electrodes electrically connected with the semiconductor layer.

Claims (18)

1. A method of fabricating a thin film transistor, comprising:

preparing a substrate;

forming a polycrystalline silicon layer on the substrate;

injecting impurities into the polycrystalline silicon layer for channel doping;

patterning the polycrystalline silicon layer and forming a semiconductor layer prior to annealing the semiconductor layer;

annealing the semiconductor layer in an H 2 O atmosphere, and forming a thermal oxide layer on the semiconductor layer;

forming a silicon nitride layer on the thermal oxide layer;

forming a gate electrode at a location corresponding to a predetermined region of the semiconductor layer;

forming an interlayer insulating layer on the entire surface of the substrate; and

forming source and drain electrodes electrically connected with the semiconductor layer.

2. The method according to claim 1 , wherein the annealing is performed by rapid thermal annealing (RTA).

3. The method according to claim 1 , wherein the annealing is performed at a temperature ranging from 400° C. to 550° C.

4. The method according to claim 1 , wherein the annealing in the H 2 O atmosphere is performed at a pressure ranging from 10000 Pa to 2 MPa.

5. The method according to claim 1 , wherein the source and drain regions are formed by injecting impurities into the semiconductor layer after forming the gate electrode.

6. The method according to claim 1 , wherein the channel doping is performed by injecting boron (B) or phosphorous (p) impurities.

7. The method according to claim 1 , wherein the channel doping is performed by injecting impurities at a dose ranging from 0.5×10 12 /cm 2 to 1.5×10 12 /cm 2 .

8. The method according to claim 1 , wherein the thermal oxide layer is formed to a thickness of 50 Å to 300 Å.

9. The method according to claim 1 , wherein the thermal oxide layer is formed of silicon oxide.

Assignments (1)
MERGER Recorded Sep 21, 2012
From: SAMSUNG MOBILE DISPLAY CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029087/0636 →