IP Library Granted Patent US 8,324,952
Granted Patent B2
US 8,324,952 · App. 13/101,038 · Granted Dec 4, 2012

Time interpolator circuit

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Quick Facts
Patent No.
US 8,324,952
App. No.
13/101,038
Granted
Dec 4, 2012
Kind
B2
Abstract

A time interpolator circuit increases the accuracy of digital counting circuits.

Claims (27)

1. A time interpolator circuit comprising:

a current source connected to a first circuit node;

a diode connected between the first circuit node and a second circuit node;

a capacitor connected between the second circuit node and ground; and,

a logic circuit including a first switch capable of connecting the first circuit node to ground and a second switch capable of connecting the second circuit node to ground.

2. The time interpolator circuit of claim 1 further comprising:

an analog-to-digital converter connected to the second circuit node.

3. The time interpolator circuit of claim 1 further comprising:

an analog-to-digital converter for measuring voltage between the second circuit node and ground.

4. The time interpolator circuit of claim 1 further comprising:

a buffer amplifier having an input connected to the second circuit node; and,

an analog-to-digital converter connected to an output of the buffer amplifier.

5. The time interpolator circuit of claim 4 , the buffer amplifier comprising an operational amplifier and a feedback resistor network.

6. The time interpolator circuit of claim 4 , the buffer amplifier input having impedance high enough to prevent discharging the capacitor through the amplifier.

7. The time interpolator circuit of claim 4 , the analog-to-digital converter measuring a voltage between the second circuit node and ground as scaled by the amplifier.

8. The time interpolator circuit of claim 1 , the first and second switches being field effect transistors.

9. The time interpolator circuit of claim 1 , the diode preventing current flow from the second circuit node to the first circuit node.

10. A frequency counter comprising:

count synchronization logic having signal, reference clock, and start/stop control inputs;

an event counter and a time counter both connected to the count synchronization logic;

a microprocessor that receives digital input from the counters and sends a start/stop control signal to the count synchronization logic; and,

an interpolator according to claim 3 , the interpolator's first and second switches connected to the count synchronization logic and digital output from the interpolator's analog-to-digital converter connected to the microprocessor.

11. A time interval counter comprising:

start synchronization logic and stop synchronization logic;

a time counter connected to the start synchronization logic and to the stop synchronization logic;

a first interpolator according to claim 3 , the first interpolator connected to the start synchronization logic; and,

a second interpolator according to claim 3 , the second interpolator connected to the stop synchronization logic.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 057280/0028) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION
Reel/Frame 065231/0466 →
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 052935/0001) Recorded Oct 13, 2023
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
Reel/Frame 065653/0463 →
SECURITY INTEREST Recorded Jun 18, 2021
From: NATIONAL INSTRUMENTS CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 057280/0028 →
SECURITY INTEREST Recorded Jun 14, 2020
From: NATIONAL INSTRUMENTS CORPORATION; PHASE MATRIX, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 052935/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 1, 2011
From: MASTERS, LEWIS W
To: PHASE MATRIX, INC.
Reel/Frame 026369/0184 →