Abrasive composition and method for manufacturing semiconductor integrated circuit device
View Patent ↗The present invention relates to a polishing composition used in a step of polishing until a barrier layer adjacent to a copper layer is exposed, in a pattern formation of polishing the copper layer provided on an insulating layer through the barrier layer thereby alternately forming a copper embedded wiring and the insulating layer, the polishing composition including: an alicyclic resin acid; a colloidal silica in which a content thereof in the polishing composition is from 0.1 to 1.5% by mass, an average primary particle size thereof is from 10 to 40 nm, an average secondary particle size thereof is from 30 to 80 nm, and (the average secondary particle size×the content) is in a range of from 10 to 40; and tetramethylammonium ion.
1. A polishing composition used in a step of polishing until a barrier layer adjacent to a copper layer is exposed, in a pattern formation of polishing the copper layer provided on an insulating layer through the barrier layer thereby alternately forming a copper embedded wiring and the insulating layer, the polishing composition comprising:
an alicyclic resin acid;
a colloidal silica in which a content thereof in the polishing composition is from 0.1 to 1.5% by mass, an average primary particle size thereof is from 10 to 40 nm, an average secondary particle size thereof is from 30 to 80 nm, and (the average secondary particle size×the content) is in a range of from 10 to 40; and
tetramethylammonium ion.
2. The polishing composition according to claim 1 , wherein a content of the tetramethylammonium ion in the polishing composition is from 0.1 to 1.4% by mass in terms of tetramethylammonium hydroxide.
3. The polishing composition according to claim 1 , wherein the alicyclic resin acid is rosin.
4. The polishing composition according to claim 1 , further comprising an oxidizing agent.
5. The polishing composition according to claim 1 , further comprising a complex forming agent.
6. The polishing composition according to claim 1 , further comprising potassium ion.
7. The polishing composition according to claim 6 , wherein a content of the potassium ion in the polishing composition is 0.6% by mass or less in terms of potassium hydroxide.
8. The polishing composition according to claim 6 , wherein a ratio of the tetramethylammonium ion/the potassium ion is 0.3 or more in terms of tetramethylammonium hydroxide/potassium hydroxide.
9. A method for producing a semiconductor integrated circuit device which comprises an insulating layer having a trench and a copper embedded wiring formed in the trench, the method comprising:
polishing a multilayered structure for the semiconductor integrated circuit device, comprising the insulating layer having formed thereon a barrier layer and a copper layer in this order, with the polishing composition according to claim 1 until the barrier layer adjacent to the copper layer is exposed.
10. The method for producing a semiconductor integrated circuit device according to claim 9 , wherein the barrier layer comprises at least one selected from the group consisting of Ta, TaN, Ti, TiN and Ru.
11. The method for producing a semiconductor integrated circuit device according to claim 9 , wherein the multilayered structure comprises a cap layer between the insulating layer and the barrier layer.
12. The method for producing a semiconductor integrated circuit device according to claim 9 , wherein the insulating layer having a trench is a silicon dioxide film or a film having a dielectric constant of 3 or less.