Passive frequency translation with voltage conversion gain

1. A passive frequency translator with positive conversion voltage gain, comprising:

at least one input node for receiving an input signal and at least one output node for providing an output signal;

a network coupled to said at least one input node and to said at least one output node, wherein said network comprises a plurality of capacitors and a plurality of switches operatively coupled to said plurality of capacitors;

wherein said plurality of switches are controlled by a corresponding plurality of clock signals to capture charge of said input signal onto said plurality of capacitors and to develop said output signal by performing frequency translation of said input signal by a mixing frequency in such a manner that DC energy of said input signal is substantially blocked from said output signal; and

wherein said output signal has a net voltage gain relative to said input signal in which energy of said output signal is predominantly derived from energy of said input signal.

2. The passive frequency translator of claim 1 , wherein each of at least three of said plurality of capacitors are configured to capture charge from said input signal and to add constructively to deliver charge to at least one other capacitor coupled to said output node.

3. The passive frequency translator of claim 1 , wherein said plurality of clock signals control said plurality of switches to store voltage samples of said input signal on said plurality of capacitors, and to develop said output signal by combining respective ones of said stored voltage samples on said plurality of capacitors.

4. The passive frequency translator of claim 1 , wherein said plurality of clock signals control said plurality of switches to store voltage samples of said input signal on said plurality of capacitors, and to develop said output signal by transferring respective ones of said stored voltage samples on said plurality of capacitors.

5. The passive frequency translator of claim 1 , wherein a settling time constant associated with capturing charge from said input signal onto said plurality of capacitors is sufficiently large with respect to a reciprocal of said mixing frequency so that settling of voltage samples of said input signal is incomplete.

6. The passive frequency translator of claim 1 , further comprising a gain control circuit coupled to said network and receiving a gain control signal, wherein said gain control circuit adjusts a level of said net voltage gain based on said gain control signal.

7. The passive frequency translator of claim 1 , wherein said plurality of switches are controlled to perform frequency translation which comprises sub sampling by an effective mixing frequency determined by at least one harmonic of said mixing frequency.

8. A method of performing passive frequency translation, comprising:

receiving an input signal;

providing a plurality of switches operatively coupled to a plurality of capacitors;

controlling the plurality of switches to combine voltage samples to develop the output signal with a net voltage gain relative to the input signal and in which energy of the output signal is predominantly derived from energy of the input signal; and

wherein said controlling the plurality of switches includes performing frequency translation of the input signal by a mixing frequency in such a manner that DC energy of the input signal is substantially blocked from the output signal.

9. The method of claim 8 , wherein said controlling the plurality of switches comprises controlling the plurality of switches to capture charge of the input signal by each of at least three of the plurality of capacitors and constructively adding the captured charge of each of the at least three of the plurality of capacitors to at least one other capacitor providing the output signal.

10. The method of claim 8 , wherein said providing a plurality of capacitors and said controlling the plurality of switches comprises providing a settling time constant associated with capturing charge from said input signal onto said plurality of capacitors which is sufficiently large with respect to a reciprocal of the mixing frequency so that settling of voltage samples of the input signal is incomplete.

11. The method of claim 8 , wherein said performing frequency translation of the input signal by a mixing frequency comprises sub sampling by an effective mixing frequency determined by at least one harmonic of the mixing frequency.

12. The method of claim 8 , wherein:

said receiving an input signal comprises receiving an input signal having a first frequency; and

wherein said controlling the plurality of switches comprises:

receiving a plurality of non-overlapping switching signals each having a predetermined duty cycle a respective frequency related to a predetermined base frequency; and

using the non-overlapping switching signals to control at least one switch to periodically charge at least two capacitors via the input signal, combine a respective charge held by each of the at least two capacitors with respective charges held by other ones of the at least two capacitors, and combine respective charges held by at least two of the at least two capacitors to construct the output signal having a second frequency.

13. The method of claim 12 , further comprising:

generating at least one local oscillator signal having the base frequency; and

generating the plurality of non-overlapping switching signals from the at least one local oscillator signal.

14. The method of claim 13 , wherein the second frequency is determined by the base frequency and harmonics of the first frequency.

15. A method of downconverting an input signal having a first frequency to an output signal having a lower second frequency, the method comprising:

periodically charging a plurality of capacitors with respective charges derived from the input signal;

periodically updating the respective charge held by each of the plurality of capacitors by combining with the respective charge held by at least one other one of the plurality of capacitors;

periodically combining the updated charges held by one or more of the plurality of capacitors to provide an output signal having a net voltage gain relative to the input signal and having an energy which is derived predominantly from energy of the input signal; and

wherein said periodically charging, updating and combining comprises performing frequency translation of the input signal by a mixing frequency in such a manner that DC energy of the input signal is substantially blocked from the output signal.

16. The method of claim 15 , wherein said periodically charging, said periodically updating, and said periodically combining are collectively performed according to an effective third frequency in which the second frequency is determined by the effective third frequency and the first frequency and wherein the effective third frequency is determined by a harmonic of the mixing frequency.

17. The method of claim 15 , wherein said periodically charging a plurality of capacitors with respective charges derived from the input signal comprises periodically coupling the input signal to the plurality of capacitors.

18. The method of claim 17 , wherein said periodically coupling the input signal to the plurality of capacitors comprises periodically activating a plurality of switches with a corresponding plurality of switching signals.

19. The method of claim 18 , wherein said periodically activating a plurality of switches with a corresponding plurality of switching signals comprises periodically activating a plurality of switches with a plurality of non-overlapping clock signals.

20. The method of claim 19 , further comprising determining the second frequency using respective frequencies of the non-overlapping clock signals and the first frequency.

21. The method of claim 15 , wherein said periodically combining the updated charges at least one of:

periodically combining the updated charges held by one or more of the plurality of capacitors coupled in series; and

periodically combining the updated charges held by one or more of the plurality of capacitors coupled in anti-series.

22. An electronic device, comprising:

a radio system, comprising:

an input circuit configured to receive a radio signal and to convert said radio signal into an input signal;

a passive frequency translator with positive conversion voltage gain, comprising:

at least one input node for receiving said input signal and at least one output node for providing an output signal;

a network coupled to said at least one input node and to said at least one output node, wherein said network comprises a plurality of capacitors and a plurality of switches operatively coupled to said plurality of capacitors;

a plurality of switches controlled by a corresponding plurality of clock signals to capture charge of said input signal onto said plurality of capacitors and to develop said output signal by performing frequency translation of said input signal by a mixing frequency in such a manner that DC energy of said input signal is substantially blocked from said output signal; and

wherein said output signal has a net voltage gain relative to said input signal in which energy of said output signal is predominantly derived from energy of said input signal; and

an output circuit for converting said output signal into a data signal; and

a host system coupled to said radio system for receiving and processing said data signal.

23. The electronic device of claim 22 , wherein said input circuit comprises only passive components.

24. The electronic device of claim 23 , wherein said passive components include a resonant circuit.

25. The electronic device of claim 24 , wherein said output circuit comprises an analog to digital converter, a digital physical device, and a link layer processing module.

26. The electronic device of claim 22 , wherein said radio system is a portion of a transceiver system comprising a transmitter, and wherein said host system is configured to transmit data via said transmitter.

27. The electronic device of claim 22 , wherein said host system comprises a host interface, a memory, and a processor.

28. The electronic device of claim 22 , wherein said radio system is incorporated within an integrated circuit.

29. The electronic device of claim 22 , wherein energy of said output signal is substantially composed of energy received from said radio signal.