Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same
View Patent ↗A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate electrode as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode is amorphized. Subsequently, a silicon oxide film is provided to cover the gate electrode, at a temperature which is less than the one at which recrystallization of the gate electrode occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode, and high tensile stress is applied to a channel region under the gate electrode. As a result, carrier mobility of the nMOS transistor is enhanced.
1. A method of manufacturing a semiconductor device, comprising:
(a) forming a gate insulating film of a MOS transistor over a semiconductor substrate;
(b) after the step (a), forming a gate electrode of the MOS transistor over the gate insulating film;
(c) after the step (b), implanting ions into the gate electrode in order to be amorphous;
(d) after the step (c), forming an insulating film in order to cover the gate electrode;
(e) after the step (d), performing thermal processing in order to crystallize the gate electrode; and
(f) after the step (e), removing the insulating film,
wherein, after the step (f), a stress is applied in a channel region of the MOS transistor under the gate electrode, and
wherein a drain current of the MOS transistor increase by the stress.
2. A method of manufacturing a semiconductor device according to the claim 1 ,
wherein the MOS transistor is an n-type MOS transistor, and
wherein the stress is a tensile.
3. A method of manufacturing a semiconductor device according to the claim 1 , further comprising:
(g) after step (f), forming a silicide layer on a top surface of the gate electrode.
4. A method of manufacturing a semiconductor device according to the claim 1 ,
wherein the ions are arsenic.
5. A method of manufacturing a semiconductor device according to the claim 1 ,
wherein the ions are germanium.
6. A method of manufacturing a semiconductor device comprising:
(a) forming a gate insulating film over a semiconductor substrate;
(b) after the step (a), forming a gate electrode of a MOS transistor over the gate insulating film;
(c) after the step (b), implanting ions into the gate electrode of the MOS transistor in order to be amorphous;
(d) after the step (c), forming an insulating film in order to cover the gate electrode at a first temperature;
(e) after the step (d), performing thermal processing in order to crystallize the gate electrode at a second temperature; and
(f) after the step (e), removing the insulating film,
wherein, after the step (f), a stress is applied in a channel region of the MOS transistor under the gate electrode,
wherein a drain current of the MOS transistor is improved by the stress, and
wherein the second temperature is higher than the first temperature.
7. A method of manufacturing a semiconductor device according to the claim 6 ,
wherein the MOS transistor is an n-type MOS transistor, and
wherein the stress is a tensile.
8. A method of manufacturing a semiconductor device according to the claim 6 , further comprising:
(g) after the step (f), forming a silicide layer on a top surface of the gate electrode.
9. A method of manufacturing a semiconductor device according to the claim 6 ,
wherein the ions are arsenic.
10. A method of manufacturing a semiconductor device according to the claim 1 ,
wherein the ions are germanium.
11. A method of manufacturing a semiconductor device, comprising:
(a) forming a gate insulating film of a MOS transistor over a semiconductor substrate;
(b) after the step (a), forming a gate electrode of the MOS transistor over the gate insulating film;
(c) after the step (b), implanting first ions in the semiconductor substrate;
(d) after the step (c), forming sidewalls over side surfaces of the gate electrode;
(e) after the step (d), implanting second ions into the gate electrode and the semiconductor substrate, thereby the gate electrode becomes amorphous;
(f) after the step (e), forming an insulating film in order to cover the gate electrode;
(g) after the step (f), performing thermal processing in order to crystallize the gate electrode; and
(h) after step (g), removing the insulating film,
wherein, after the step (h), a stress is applied in a channel region of the MOS transistor under the gate electrode, and
wherein a drain current of the MOS transistor is improved by the stress.
12. A method of manufacturing a semiconductor device according to the claim 11 ,
wherein the MOS transistor is an n-type MOS transistor, and
wherein the stress is a tensile.
13. A method of manufacturing a semiconductor device according to the claim 11 , further comprising:
(i) after step (h), forming a silicide layer on a top surface of the gate electrode.
14. A method of manufacturing a semiconductor device according to the claim 11 ,
wherein the second ions are arsenic.
15. A method of manufacturing a semiconductor device according to the claim 11 ,
wherein the second ions are germanium.
16. A method of manufacturing a semiconductor device according to the claim 11 ,
wherein the step (f) is performed at a first temperature,
wherein the step (g) is performed at a second temperature, and
wherein the second temperature is higher than the first temperature.
17. A method of manufacturing a semiconductor device according to the claim 16 ,
wherein the step (d) is performed at a third temperature, and
wherein the second temperature is higher than the third temperature.