T-type three-level inverter circuit
View Patent ↗This invention relates to a T-type three-level inverter circuit. The circuit includes an absorption unit. In the absorption unit, a first terminal of the first resistor is connected to a positive bus terminal, and a second terminal of the first resistor is connected to a first terminal of the first capacitor and a negative electrode of the first diode; a second terminal of the first capacitor and an positive electrode of the first diode are respectively connected to an emitter and a collector of the first controllable switch tube; a first terminal of the second resistor is connected to a negative bus terminal, and a second terminal of the second resistor is connected to a positive electrode of a third diode; a negative electrode of the third diode is connected to both a first terminal of the second capacitor and a positive electrode of a second diode; and a second terminal of the second capacitor and a negative electrode of the second diode are respectively connected to a collector and a emitter of the second controllable switch tube. As the T-type three-level inverter circuit according to the invention is implemented, a voltage stress on the bidirectional switch tube is effectively reduced due to strong absorption capacity of the absorption unit, and thus the bidirectional switch tube can adopt a tube having a relatively low breakdown voltage value. Moreover, the absorption unit has a low cost and a small loss.
1. An inverter circuit, comprising a bidirectional, controllable switch ( 10 ), the bidirectional, controllable switch ( 10 ) including a first controllable switch (Q 3 ) and a second controllable switch (Q 4 ) in inverse series connection, wherein the inverter circuit also comprises an absorption unit ( 20 ), the absorption unit ( 20 ) including a first resistor (R 3 ), a first capacitor (C 3 ), a first diode (D 3 ), a second resistor (R 4 ), a second capacitor (C 4 ), and a second diode (D 4 ), in which a first terminal of the first resistor (R 3 ) is connected to a positive bus terminal, and a second terminal of the first resistor (R 3 ) is connected to a first terminal of the first capacitor (C 3 ) and a negative electrode of the first diode (D 3 ); a second terminal of the first capacitor (C 3 ) and a positive electrode of the first diode (D 3 ) are respectively connected to a first electrode and a second electrode of the first controllable switch (Q 3 ); a first terminal of the second resistor (R 4 ) is connected to a negative bus terminal, and a second terminal of the second resistor (R 4 ) is connected to a first terminal of the second capacitor (C 4 ) and a positive electrode of the second diode (D 4 ); and a second terminal of the second capacitor (C 4 ) and a negative electrode of the second diode (D 4 ) are respectively connected to a second electrode and a first electrode of the second controllable switch Q 4 .
2. The inverter circuit according to claim 1 , wherein the bidirectional switch ( 10 ) also comprises a fourth diode (D 5 ) in inverse parallel connection with the first controllable switch (Q 3 ) and a fifth diode (D 6 ) in inverse parallel connection with the second controllable switch (Q 4 ).
3. The inverter circuit according to claim 1 , wherein the inverter circuit also comprises a third resistor (R 1 ), a third capacitor (C 1 ), a fourth resistor (R 2 ) and a fourth capacitor (C 2 ) sequentially connected in series between the positive bus terminal and the negative bus terminal.
4. The inverter circuit according to claim 3 , wherein the inverter circuit also comprises a third controllable switch (Q 1 ), a fourth controllable switch (Q 2 ), a sixth diode (D 7 ) and a seventh diode (D 8 ), in which both an emitter of the third controllable switch (Q 1 ) and a collector of the fourth controllable switch (Q 2 ) are connected to a connection point of the third capacitor (C 1 ) and the fourth resistor (R 2 ); a collector of the third controllable switch (Q 1 ) is connected to the positive bus terminal; an emitter of the fourth controllable switch (Q 2 ) is connected to the negative bus terminal; a negative electrode and a positive electrode of the sixth diode (D 7 ) are respectively connected to the collector and the emitter of the third controllable switch (Q 1 ); and a negative electrode and a positive electrode of the seventh diode (D 8 ) are respectively connected to the collector and the emitter of the fourth controllable switch (Q 2 ).
5. The inverter circuit according to claim 1 , wherein values of reverse breakdown voltage of the second diode (D 4 ) and the first diode (D 3 ) are higher than a bus voltage.
6. The inverter circuit according to claim 5 , wherein the bidirectional switch ( 10 ) also comprises a fourth diode (D 5 ) in inverse parallel connection with the first controllable switch (Q 3 ) and a fifth diode (D 6 ) in inverse parallel connection with the second controllable switch (Q 4 ).
7. The inverter circuit according to claim 5 , wherein the inverter circuit also comprises a third resistor (R 1 ), a third capacitor (C 1 ), a fourth resistor (R 2 ) and a fourth capacitor (C 2 ) sequentially connected in series between the positive bus terminal and the negative bus terminal.
8. The inverter circuit according to claim 7 , wherein the inverter circuit also comprises a third controllable switch (Q 1 ), a fourth controllable switch (Q 2 ), a sixth diode (D 7 ) and a seventh diode (D 8 ), in which both an emitter of the third controllable switch (Q 1 ) and a collector of the fourth controllable switch (Q 2 ) are connected to a connection point of the third capacitor (C 1 ) and the fourth resistor (R 2 ); a collector of the third controllable switch (Q 1 ) is connected to the positive bus terminal; an emitter of the fourth controllable switch (Q 2 ) is connected to the negative bus terminal; a negative electrode and a positive electrode of the sixth diode (D 7 ) are respectively connected to the collector and the emitter of the third controllable switch (Q 1 ); and a negative electrode and a positive electrode of the seventh diode (D 8 ) are respectively connected to the collector and the emitter of the fourth controllable switch (Q 2 ).
9. The inverter circuit according to claim 1 , wherein the absorption unit ( 20 ) further includes a third diode (D 41 ), a positive electrode of the third diode (D 41 ) is connected to the second terminal of the second resistor (R 4 ) and a negative electrode of the third diode (D 41 ) is connected to both the first terminal of the second capacitor (C 4 ) and the positive electrode of the second diode (D 4 ).
10. The inverter circuit according to claim 1 , wherein the first electrode and the second electrode for each of the first controllable switch (Q 3 ) and the second controllable switch (Q 4 ) are an emitter and a collector of a bipolar transistor, respectively.
11. The inverter circuit according to claim 1 , wherein the inverter circuit is a T-type three-level inverter circuit.