IP Library Granted Patent US 8,928,793
Granted Patent B2
US 8,928,793 · App. 13/106,804 · Granted Jan 6, 2015

Imager array interfaces

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Quick Facts
Patent No.
US 8,928,793
App. No.
13/106,804
Granted
Jan 6, 2015
Kind
B2
Abstract

Architectures for imager arrays configured for use in array cameras in accordance with embodiments of the invention are described. One embodiment of the invention includes a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane, control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable, sampling circuitry configured to convert pixel outputs into digital pixel data, and output interface circuitry configured to transmit pixel data via an output interface.

Claims (43)

1. An imager array, comprising:

a plurality of focal planes, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane;

control circuitry configured to control the capture of image information by the pixels within the focal planes, where the control circuitry is configured so that the capture of image information by the pixels in at least two of the focal planes is separately controllable, wherein the control circuitry is further configured to capture images for each of the plurality of active focal planes;

sampling circuitry configured to convert pixel outputs into digital pixel data;

master control logic circuitry configured to generate at least one line of image data by time multiplexing the digital pixel data of each image captured by each of the plurality of active focal planes, wherein the control circuitry is further configured to insert codes between the digital pixel data that provide information for use in re-assembling the at least one line of image data back into the individual images captured by each active focal plane; and

output interface circuitry configured to transmit pixel data via an output interface.

2. The imager array of claim 1 , wherein:

the imager array includes M×N focal planes;

the output interface includes less than M×N output ports; and

the control circuitry is configured to time multiplex the pixel data onto the output ports of the output interface.

3. The imager array of claim 1 , wherein the control circuitry further comprises memory configured to buffer pixel data from the plurality of focal planes until a time-slot is available on an output port of the output interface to transmit the pixel data.

4. The imager array of claim 1 , where the codes provide information identifying a focal plane.

5. The imager array of claim 1 , where the codes provide information identifying at least one row of pixels within a focal plane.

6. The imager array of claim 1 , where the codes provide information identifying at least one column of pixels within a focal plane.

7. The imager array of claim 1 , where the codes provide information identifying the relative time of pixel data capture.

8. The imager array of claim 7 , wherein the codes provide information identifying the relative start time of the pixel data capture.

9. The imager array of claim 7 , wherein the codes provide information identifying the relative end time of the pixel data capture.

10. The imager array of claim 7 , wherein the control circuitry further comprises a counter and the codes that provide information identifying the relative time of pixel data capture are generated using the counter.

11. The imager array of claim 1 , where the codes provide information concerning operating parameters of the imager array.

12. The imager array of claim 11 , wherein the codes provide the integration time of each focal plane.

13. The imager array of claim 11 , wherein the codes provide the gain of each focal plane.

14. The imager array of claim 1 , wherein the output interface circuitry is configured to insert a frame blanking interval between transmission of pixel data via the output interface.

15. The imager array of claim 14 , wherein the output interface circuitry is further configured to insert a line blanking interval between transmission of lines of pixel data via the output interface.

16. The imager array of claim 1 , wherein the output interface circuitry is configured to transform the pixel data by performing bit reductions.

17. The imager array of claim 3 , wherein the memory is sufficient to buffer at least a complete row of image data from all active focal planes so as to support at least one of reordering and retiming of the image data from all focal planes.

18. A method of obtaining pixel data, comprising:

separately capturing pixel data of a plurality of images using an imager array having a plurality of focal planes that each capture an image when active, where each focal plane comprises a two dimensional arrangement of pixels having at least two pixels in each dimension and each focal plane is contained within a region of the imager array that does not contain pixels from another focal plane;

during the capture of the pixel data, (i) generating at least one line of image data by multiplexing the pixel data of each image captured by each of the plurality of active focal planes and (ii) buffering portions of the captured pixel data within memory in the imager array;

using control circuitry on the imager array to insert codes between the pixel data that provide information for use in re-assembling the at least one line of image data back into the individual images captured by each active focal plane; and

transmitting the buffered pixel data via an output interface in the imager array when a time-slot is available on an output port.

19. The method of claim 18 , where the codes provide information identifying a focal plane.

20. The method of claim 18 where the codes provide information identifying at least one row of pixels within a focal plane.

21. The method of claim 18 , where the codes provide information identifying at least one of:

at least one column of pixels within a focal plane;

the relative time of pixel data capture;

the relative start time of the pixel data capture;

the relative end time of the pixel data capture;

the integration time of each focal plane; and

the gain of each focal plane.

22. The method of claim 18 , further comprising using control circuitry on the imager array to insert a line blanking interval between transmissions of buffered pixel data via the output interface.

23. The method of claim 21 , further comprising using control circuitry on the imager array to insert a frame blanking interval upon completion of the transmission of the captured pixel data.

24. The imager array of claim 17 , wherein the image data is packaged with a same timing or ordering arrangement.

25. The imager array of claim 17 , wherein the image data from all active focal planes is aligned to a uniform row start portion.

Assignments (13)
SECURITY INTEREST Recorded May 3, 2023
From: ADEIA GUIDES INC.; ADEIA IMAGING LLC; ADEIA MEDIA HOLDINGS LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC; ADEIA SOLUTIONS LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 063529/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2018
From: FOTONATION CAYMAN LIMITED
To: FOTONATION LIMITED
Reel/Frame 046539/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2016
From: KIP PELI P1 LP
To: PELICAN IMAGING CORPORATION
Reel/Frame 040674/0677 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2016
From: PELICAN IMAGING CORPORATION
To: FOTONATION CAYMAN LIMITED
Reel/Frame 040675/0025 →
CHANGE OF NAME Recorded Oct 19, 2016
From: DBD CREDIT FUNDING LLC
To: DRAWBRIDGE SPECIAL OPPORTUNITIES FUND LP
Reel/Frame 040423/0725 →
CHANGE OF NAME Recorded Oct 19, 2016
From: DBD CREDIT FUNDING LLC
To: DRAWBRIDGE SPECIAL OPPORTUNITIES FUND LP
Reel/Frame 040494/0930 →
SECURITY INTEREST Recorded Jun 13, 2016
From: DBD CREDIT FUNDING LLC
To: DRAWBRIDGE OPPORTUNITIES FUND LP
Reel/Frame 038982/0151 →
SECURITY INTEREST Recorded Jun 13, 2016
From: DBD CREDIT FUNDING LLC
To: DRAWBRIDGE OPPORTUNITIES FUND LP
Reel/Frame 039117/0345 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR AND ASSIGNEE PREVIOUSLY RECORDED AT REEL: 037565 FRAME: 0439. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jan 25, 2016
From: KIP PELI P1 LP
To: DBD CREDIT FUNDING LLC
Reel/Frame 037591/0377 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2016
From: PELICAN IMAGING CORPORATION
To: KIP PELI P1 LP
Reel/Frame 037565/0385 →
SECURITY INTEREST Recorded Jan 22, 2016
From: PELICAN IMAGING CORPORATION
To: KIP PELI P1 LP
Reel/Frame 037565/0439 →
SECURITY INTEREST Recorded Jan 22, 2016
From: PELICAN IMAGING CORPORATION
To: DBD CREDIT FUNDING LLC
Reel/Frame 037565/0417 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2011
From: MCMAHON, ANDREW KENNETH JOHN
To: PELICAN IMAGING CORPORATION
Reel/Frame 026823/0674 →