Passivated upstanding nanostructures and methods of making the same

1. A device comprising:

a substrate;

one or more of a nanostructure extending essentially perpendicularly from the substrate;

wherein the nanostructure comprises a core of a doped semiconductor of a first type, a first layer comprising a lightly doped amorphous semiconductor or an intrinsic amorphous semiconductor, and a second layer comprising a heavily doped amorphous semiconductor layer of a second type opposite from the first type, wherein the first layer is disposed on the core and the second layer is disposed on the first layer;

wherein the first layer passivates at least a surface of the core;

wherein the first layer is disposed on an end surface of the core away from the substrate;

wherein an entirety of the first layer and an entirety of the second layer are coextensive with the core in at least a direction parallel to the substrate.

2. The device of claim 1 , wherein sidewalls of the core are at least partially covered by an electrically insulating layer.

3. The device of claim 1 , wherein the core comprises one or more doped semiconductor material selected from the group consisting of doped silicon, doped germanium, doped III-V group compound semiconductor, doped II-VI group compound semiconductor, and doped quaternary semiconductor; wherein the first layer comprises one or more intrinsic amorphous semiconductor material selected from the group consisting intrinsic amorphous silicon, intrinsic amorphous germanium, intrinsic amorphous III-V group compound semiconductor and intrinsic amorphous II-VI group compound semiconductor; and wherein the second layer comprises one or more heavily doped amorphous semiconductor material selected from the group consisting heavily doped amorphous silicon, heavily doped amorphous germanium, heavily doped amorphous III-V group compound semiconductor and heavily doped amorphous II-VI group compound semiconductor.

4. The device of claim 1 , wherein the core is lightly doped.

5. The device of claim 1 , wherein the first layer has a thickness of about 2 nm to about 100 nm.

6. The device of claim 1 , wherein the second layer has a thickness of at least about 10 nm.

7. The device of claim 1 , wherein the second layer, the first layer and the core form a p-i-n junction.

8. The device of claim 1 , wherein the nanostructure is a nanowire or a nanoslab.

9. A method of manufacturing the device of claim 1 , comprising depositing the first layer on the core by atomic layer deposition (ALD) or chemical vapor deposition (CVD); and depositing the second layer on the first layer by ALD or CVD.

10. The device of claim 1 , wherein the heavily doped amorphous semiconductor layer has doping levels merged into an impurity band.

11. The device of claim 1 , wherein the heavily doped amorphous semiconductor layer does not show an increase in conductivity with temperature.

12. The device of claim 1 , wherein the first layer eliminates dangling bonds on the at least surface of the core.