IP Library Patent Application 13107222
Patent Application
App. No. 13/107,222

PHOTOVOLTAIC DEVICE CONDUCTING LAYER

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Patent No.
US None
App. No.
13/107,222
Abstract

A multilayered structure may include a doped buffer layer on a transparent conductive oxide layer.

Claims (78)

1 . A multilayered structure comprising:

a barrier layer adjacent to a substrate;

a transparent conductive oxide layer adjacent to the barrier layer; and

a buffer layer comprising a dopant adjacent to the transparent conductive oxide layer.

2 . The multilayered structure of claim 1 , wherein the dopant is selected from the group consisting of copper, arsenic, and antimony.

3 . The multilayered structure of claim 1 , wherein the doped buffer layer comprises a material selected from the group consisting of tin oxide, zinc oxide, zinc stannate, zinc magnesium oxide, and tin silicon oxide.

4 . The multilayered structure of claim 1 , wherein the doped buffer layer comprises multiple layers.

5 . The multilayered structure of claim 4 , wherein one of the multiple layers comprises a doped layer, and another one of the multiple layers is an undoped layer, and the doped layer is adjacent to the undoped layer.

6 . The multilayered structure of claim 1 , wherein the doped buffer layer has a dopant concentration of more than about 1×10 15 /cm 2 .

7 . The multilayered structure of claim 1 , wherein the doped buffer layer comprises a tin oxide and has a dopant to tin oxide ratio of about 10 −5 to about 10 −1 .

8 . The multilayered structure of claim 1 , further comprising a semiconductor window layer adjacent to the doped buffer layer, wherein the semiconductor window layer comprises a material selected from the group consisting of cadmium sulfide, zinc sulfide, cadmium zinc sulfide, and zinc magnesium oxide.

9 . The multilayered structure of claim 8 , further comprising a semiconductor absorber layer adjacent to the doped buffer layer, wherein the semiconductor absorber layer comprises a material selected from the group consisting of cadmium telluride, zinc telluride, and cadmium zinc telluride.

10 . The multilayered structure of claim 9 , wherein the multilayered structure has a carrier concentration of greater than about 1×10 14 /cm 3 .

11 . A method of manufacturing a multilayered structure, the method comprising:

forming a doped buffer layer adjacent to a transparent conductive oxide layer, wherein the transparent conductive oxide layer is adjacent to a substrate; and

forming a semiconductor window layer adjacent to the buffer layer;

forming a semiconductor absorber layer adjacent to the semiconductor window layer; and

and heating the multilayered structure to a temperature sufficient to diffuse dopant from the buffer layer into the semiconductor absorber layer.

12 . The method of claim 11 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 300 degrees C.

13 . The method of claim 11 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 450 degrees C.

14 . The method of claim 11 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 600 degrees C.

15 . The method of claim 11 , wherein the step of heating the multilayered structure comprises heating the multilayered structure to a temperature greater than 750 degrees C.

16 . The method of claim 11 , wherein the dopant comprises a material selected from the group consisting of copper, arsenic, and antimony.

17 . The method of claim 11 , further comprising forming the transparent conductive oxide layer adjacent to the substrate before forming the doped buffer layer.

18 . The method of claim 11 , wherein the step of forming a doped buffer layer comprises co-sputtering buffer layer material and dopant from separate sputter targets.

19 . The method of claim 14 , wherein the buffer layer material comprises tin and the dopant comprises a material selected from the group consisting of copper, arsenic, and antimony.

20 . The method of claim 11 , wherein the step of forming a doped buffer layer comprises forming a buffer layer adjacent to the transparent conductive oxide layer and doping the buffer layer with a dopant.

21 . The method of claim 11 , wherein the doped buffer layer has more than about 1×10 15 /cm 2 of dopant.

22 . The method of claim 11 , wherein the step of forming a doped buffer layer comprises a reactive sputtering process.

23 . The method of claim 11 , wherein the step of forming a doped buffer layer comprises atmospheric pressure chemical vapor deposition.

24 . The method of claim 11 , further comprising an additional step of heating the transparent conductive oxide stack comprising the transparent conductive oxide layer to anneal the transparent conductive oxide stack.

25 . A photovoltaic device comprising

a barrier layer adjacent to a substrate;

a transparent conductive oxide layer adjacent to the barrier layer;

a buffer layer comprising a dopant adjacent to the transparent conductive oxide layer;

a semiconductor window layer adjacent to the buffer layer;

a semiconductor absorber layer adjacent to the semiconductor window layer, wherein the semiconductor absorber layer comprises a portion of the dopant, diffused from the buffer layer; and

a back contact adjacent to the semiconductor absorber layer.

26 . The photovoltaic device of claim 25 , wherein the dopant comprises a material selected from the group consisting of copper, arsenic, and antimony.

27 . The photovoltaic device of claim 25 , wherein the dopant diffused from the buffer layer to the semiconductor absorber layer is present in a substantially uniform concentration proximate to the buffer layer.

28 . A sputter target comprising:

a sputter material comprising tin and a material selected from the group consisting of copper, arsenic, and antimony; and

a stainless steel tube, wherein the sputter material is connected to the stainless steel tube to form a sputter target.

29 . The sputter target of claim 28 , wherein the sputter material comprises a tin oxide.

30 . The sputter target of claim 28 , wherein the sputter material has a copper to tin ratio of about 10 −6 to about 5×10 −2 .

31 . The sputter target of claim 28 , wherein the sputter target comprises a ceramic tin oxide and copper.

32 . The sputter target of claim 28 , further comprising a bonding layer bonding the sputter material and the backing tube.

33 . A method of manufacturing a sputter target comprising:

forming a sputter material comprising tin and a material selected from the group consisting of copper, arsenic, and antimony; and

attaching the sputter material to a backing tube to form a sputter target.

34 . The method of claim 33 , wherein the step of attaching the sputter material to a backing tube to form a sputter target comprises a thermal spray forming process.

35 . The method of claim 33 , wherein the step of attaching the sputter material to a backing tube to form a sputter target comprises a plasma spray forming process.

36 . The method of claim 33 , wherein the step of attaching the sputter material to a backing tube to form a sputter target comprises a powder metallurgy process.

37 . The method of claim 33 , wherein the powder metallurgy process comprises a hot press process.

38 . The method of claim 33 , wherein the powder metallurgy process comprises an isostatic process.

39 . The method of claim 33 , wherein the step of attaching the sputter material to a backing tube to form a sputter target comprises a flow forming process.

40 . The method of claim 33 , wherein the step of attaching the sputter material to the backing tube comprises bonding the sputtering material to the backing tube with a bonding layer.

41 . A photovoltaic module comprising:

a plurality of photovoltaic cells adjacent to a substrate; and

a back cover adjacent to the plurality of photovoltaic cells, each one of the plurality of photovoltaic cells comprising:

a barrier layer adjacent to the substrate;

a transparent conductive oxide layer adjacent to the barrier layer;

a buffer layer comprising a dopant adjacent to the transparent conductive oxide layer;

a semiconductor window layer adjacent to the buffer layer;

a semiconductor absorber layer adjacent to the semiconductor window layer, wherein the semiconductor absorber layer comprises a portion of the dopant, diffused from the buffer layer; and

a back contact adjacent to the semiconductor absorber layer.

42 . The photovoltaic module of claim 41 , further comprising a plurality of positive and negative electrical lines configured to electrically connect the photovoltaic cells to a positive lead and a negative lead.

43 . The photovoltaic module of claim 42 , further comprising a positive bus bar and negative bus bar configured to electrically connect the photovoltaic cells to a positive lead and a negative lead.

44 . The photovoltaic module of claim 43 , wherein the positive lead and negative lead are configured to electrically connect the photovoltaic module to at least on additional photovoltaic module to form a photovoltaic array.

45 . A method for generating electricity, the method comprising:

illuminating a photovoltaic cell with a beam of light to generate a photocurrent; and

collecting the generated photocurrent, wherein the photovoltaic cell comprises:

a barrier layer adjacent to a substrate;

a transparent conductive oxide layer adjacent to the barrier layer;

a buffer layer comprising a dopant adjacent to the transparent conductive oxide layer;

a semiconductor window layer adjacent to the buffer layer;

a semiconductor absorber layer adjacent to the semiconductor window layer, wherein the semiconductor absorber layer comprises a portion of the dopant, diffused from the buffer layer; and

a back contact adjacent to the semiconductor absorber layer.

Assignments (3)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 15, 2021
From: JPMORGAN CHASE BANK, N.A.
To: FIRST SOLAR, INC.
Reel/Frame 058132/0261 →
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT APPLICATION 13/895113 ERRONEOUSLY ASSIGNED BY FIRST SOLAR, INC. TO JPMORGAN CHASE BANK, N.A. ON JULY 19, 2013 PREVIOUSLY RECORDED ON REEL 030832 FRAME 0088. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECT PATENT APPLICATION TO BE ASSIGNED IS 13/633664. Recorded Sep 19, 2014
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 033779/0081 →
SECURITY AGREEMENT Recorded Jul 19, 2013
From: FIRST SOLAR, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 030832/0088 →