IP Library Granted Patent US 8,780,073
Granted Patent B2
US 8,780,073 · App. 13/114,153 · Granted Jul 15, 2014

Capacitive sensor arrangement

Inventors: Igor Polishchuk (Fremont, CA); Vasyl Mandziy (Lviv, UA)
Assignee: Cypress Semiconductor Corporation
G06F3/044G06F2203/04111G06F2203/04103
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,780,073
App. No.
13/114,153
Granted
Jul 15, 2014
Kind
B2
Abstract

An example capacitive sensor arrangement includes an integrated member residing within an interior region of a capacitive sensor element. The capacitive sensor element has a first resistance to a flow of current and the integrated member has a second resistance to the flow of current that is less than the first resistance.

Claims (30)

1. A capacitive sensor arrangement, comprising:

a capacitive sensor element having a first resistance to a flow of current;

an integrated member residing within a first interior region of the capacitive sensor element, the integrated member having a second resistance to the flow of current, the second resistance to the flow of current being less than the first resistance to the flow of current; and

an interconnect coupled to a second interior region of the capacitive sensor element that is different from the first interior region, the interconnect configured to carry the flow of current at least one of to the capacitive sensor element and from the capacitive sensor element.

2. The capacitive sensor arrangement of claim 1 , wherein the interior region of the capacitive sensor element includes a surface area of the capacitive sensor element, and the integrated member is coupled with the surface area.

3. The capacitive sensor arrangement of claim 1 , wherein the capacitive sensor element includes a border region that is a border between at least a portion of the interior region and an edge of the capacitive sensor element, and the integrated member extends between the interior region and the border region.

4. The capacitive sensor arrangement of claim 1 , wherein the capacitive sensor element is comprised of a transparent conducting film and the integrated member is visually indistinguishable from the capacitive sensor element to a naked eye of a user.

5. The capacitive sensor arrangement of claim 4 , wherein the integrated member has a width ranging from around 6 micrometers to around 8 micrometers.

6. The capacitive sensor arrangement of claim 4 , wherein the integrated member is comprised of metal.

7. The capacitive sensor arrangement of claim 1 , wherein the interconnect has the second resistance to the flow of current.

8. The capacitive sensor arrangement of claim 7 , wherein the interconnect is coupled with the integrated member, the interconnect and the integrated member are comprised of a same material, and the interconnect and the integrated member have a same width.

9. A capacitive sensor arrangement, comprising:

a capacitive sensor element comprised of a transparent conducting film;

an integrated member residing within a first region of the capacitive sensor element, the integrated member comprised of metal and having a width that is less than approximately 8 micrometers; and

an interconnect coupled to a second region of the capacitive sensor element that is different from the first region, the interconnect configured to carry a flow of current at least one of to the capacitive sensor element and from the capacitive sensor element.

10. The capacitive sensor arrangement of claim 9 , wherein the region of the capacitive sensor element includes an interior region having a surface area of the capacitive sensor element, and the integrated member is coupled with the surface area.

11. The capacitive sensor arrangement of claim 9 , wherein the capacitive sensor element includes an edge having a surface area of the capacitive sensor element, and the integrated member is coupled to the surface area along the edge.

12. The capacitive sensor arrangement of claim 9 , wherein the interconnect and the integrated member are comprised of the metal and has the width that is less than 8 micrometers.

13. A touch input device, comprising:

a substrate;

a first plurality of capacitive sensor elements residing in a capacitive sensor layer on the substrate;

a second plurality of capacitive sensor elements residing in the capacitive sensor layer on the substrate;

one or more first interconnects residing in the capacitive sensor layer, the one or more first interconnects configured to couple the first plurality of capacitive sensor elements to one another;

one or more second interconnects, the one or more second interconnects configured to couple the second plurality of capacitive sensor elements to one another while electrically insulated from the one or more first interconnects and the first plurality of capacitive sensor elements; and

one or more integrated members residing within an interior region of each of the capacitive sensor elements of the first plurality of capacitive sensor elements and the second plurality of capacitive sensor elements, the one or more integrated members having a lower resistance to a current than a higher resistance to the current of each of the capacitive sensor elements of the first plurality of capacitive sensor elements and the second plurality of capacitive sensor elements, wherein an integrated member of at least one of the capacitive sensors elements does not directly contact any interconnect coupled to the at least one capacitive sensor element.

14. The touch input device of claim 13 , wherein each capacitive sensor element of the first plurality of capacitive sensor elements and the second plurality of capacitive sensor elements includes a border region that surrounds at least a portion of the interior region, and the one or more integrated members extend along a surface area of each capacitive sensor element from the border region into the interior region.

15. The touch input device of claim 13 , wherein the capacitive sensor layer is comprised of a transparent conducting film and the one or more integrated members are visually indistinguishable, to a naked eye of a user, from the capacitive sensor elements residing in the capacitive sensor layer.

16. The touch input device of claim 13 , wherein the one or more integrated members have a width that is no greater than 8 micrometers.

17. The touch input device of claim 13 , wherein the one or more integrated members are comprised of a metal.

18. The touch input device of claim 13 , wherein the one or more second interconnects have the lower resistivity to the current.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
PATENT SECURITY AGREEMENT Recorded Aug 28, 2012
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 028863/0870 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2011
From: POLISHCHUK, IGOR; MANDZIY, VASYL
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 027164/0257 →
Continuity (2)
Provisional Application 61347581 · May 24, 2010
Related Publication 20120044197A1 · Feb 23, 2012