IP Library Granted Patent US 8,344,353
Granted Patent B2
US 8,344,353 · App. 13/114,384 · Granted Jan 1, 2013

Light emitting diode having a transparent substrate

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,344,353
App. No.
13/114,384
Granted
Jan 1, 2013
Kind
B2
Abstract

A light emitting diode having a transparent substrate and a method for manufacturing the same. The light emitting diode is formed by creating two semiconductor multilayers and bonding them. The first semiconductor multilayer is formed on a non-transparent substrate. The second semiconductor multilayer is created by forming an amorphous interface layer on a transparent substrate. The two semiconductor multilayers are bonded and the non-transparent substrate is removed, leaving a semiconductor multilayer with a transparent substrate.

Claims (47)

1. A multilayer structure, comprising:

a light-emitting layer having an upper side, a lower side, and a lateral side;

an amorphous interface layer, not for growing the light-emitting layer, arranged on the lower side and being distant from the light-emitting layer; and

a lower electrode arranged on the lateral side and directly connected to the amorphous interface layer.

2. The multilayer structure of claim 1 , further comprising:

a transparent substrate arranged on the lower side of the light-emitting layer.

3. The multilayer structure of claim 1 , further comprising:

an upper electrode arranged on the upper side of the light-emitting layer.

4. The multilayer structure of claim 1 , further comprising:

an upper electrode arranged in an oblique direction of the lower electrode.

5. The multilayer structure of claim 1 , wherein the lower electrode is separated from the light-emitting layer.

6. The multilayer structure of claim 1 , wherein the amorphous interface layer has a top surface facing the lower side and not being entirely covered by the light-emitting layer.

7. A multilayer structure, comprising:

a semiconductor multilayer structure adapted to emit light and having an upper surface, a lower surface opposite to the upper surface, and a side surface;

an amorphous interface layer arranged on the upper surface and not for growing the semiconductor multilayer structure; and

a lower electrode directly connected to the amorphous interface layer and separated from the semiconductor multilayer structure.

8. The multilayer structure of claim 7 , further comprising:

a substrate arranged on the lower surface.

9. The multilayer structure of claim 7 , further comprising:

an upper electrode arranged on the upper surface of the semiconductor multilayer structure.

10. The multilayer structure of claim 7 , further comprising:

an upper electrode arranged in an oblique direction of the lower electrode.

11. The multilayer structure of claim 7 , wherein the semiconductor multilayer structure comprises an MQW light-emitting layer distant from the amorphous interface layer.

12. The multilayer structure of claim 7 , wherein the semiconductor multilayer structure is narrower than the amorphous interface layer.

13. The multilayer structure of claim 7 , wherein the amorphous interface layer is elongated past the side surface.

14. A multilayer structure, comprising:

a semiconductor multilayer structure adapted to emit light and having a top boundary, a bottom boundary, and a lateral boundary;

an amorphous interface layer, not for growing the semiconductor multilayer structure, arranged under the bottom boundary and beyond the lateral boundary;

an upper electrode arranged above the top boundary; and

a lower electrode arranged in an oblique direction of the upper electrode, the lower electrode being directly connected to the amorphous interface layer.

15. The multilayer structure of claim 14 , wherein the amorphous interface layer is transparent to the light from the semiconductor multilayer structure.

16. The multilayer structure of claim 14 , wherein the amorphous interface layer is electrically connected to the semiconductor multilayer structure.

17. The multilayer structure of claim 15 , wherein the semiconductor multilayer structure comprises a light-emitting layer distant from the amorphous interface layer.

18. The multilayer structure of claim 14 , wherein the amorphous interface layer is wider than the semiconductor multilayer structure.

19. A multilayer structure, comprising:

a light-emitting layer configured to emit light;

an amorphous interface layer, not for epitaxially growing a layer directly connected to the amorphous interface layer, being distant from the light-emitting layer and having a portion not covered by the light-emitting layer; and

a lower electrode arranged on the portion not covered by the light-emitting layer and electrically connected to the light-emitting layer.

20. The multilayer structure of claim 19 , further comprising:

a transparent substrate being distant from the light-emitting layer and close to the amorphous layer.

21. The multilayer structure of claim 19 , further comprising:

an upper electrode arranged on the light-emitting layer and separated from the amorphous interface layer.

22. The multilayer structure of claim 19 , wherein the lower electrode is separated from the light-emitting layer.

23. The multilayer structure of claim 19 , wherein the amorphous interface layer is transparent to light emitted from the light-emitting layer.

24. The multilayer structure of claim 19 , wherein the amorphous interface layer comprises an oxide.

25. The multilayer structure of claim 19 , wherein the amorphous interface layer comprises at least one metallic element not presented in the light-emitting layer.

26. The multilayer structure of claim 19 , wherein the layer directly connected to the amorphous interface layer comprises a contact layer.