Packetized audio data operations in a wireless local area network device
View Patent ↗A wireless local area network (WLAN) transceiving integrated circuit includes a WLAN interface, an input buffer, an input buffer controller, and a processor. The WLAN transceiving integrated circuit may also include an output buffer, an output buffer controller, a transcoder, and/or an audio Coder-Decoder (CODEC). The WLAN transceiving integrated circuit is installed in a WLAN device that services voice communications. The input buffer receives packetized audio data from the WLAN interface. When the input buffer satisfies a buffer vacancy threshold, the processor and the input buffer controller cooperatively operate to fill at least a portion of the input buffer with packetized audio data. The processor copies packetized audio data from the input buffer and fills the input buffer with the copied packetized audio data to maintain an audio pattern in the input buffer. The input buffer controller fills the input buffer when the processor is available and after copying/filling is no longer effective. The processor operates to maintain the audio pattern when additional packetized audio data is received by the WLAN interface. These operations are also performed for the output buffer, which receives packetized audio data from the transcoder and writes the packetized audio data to the WLAN interface.
1. Integrated circuitry operable to service communications for a wireless device, the integrated circuitry comprising:
a buffer operably coupled to a wireless interface of the wireless device and operable to receive data from the wireless interface;
processing circuitry operably coupled to the wireless interface and to the buffer; and
wherein when the buffer satisfies a buffer threshold indicating lost wireless data, the processing circuitry operates to fill at least a portion of the buffer with data having a data pattern consistent with data stored in the data buffer.
2. The integrated circuitry of claim 1 , wherein:
the processing circuitry comprises a buffer controller and a processor;
during a first operation when the buffer satisfies the buffer threshold, the processor operates to fill at least a portion of the buffer with data; and
during a second operation when the buffer satisfies the buffer threshold, the buffer controller operates to fill at least a portion of the buffer with data.
3. The integrated circuitry of claim 2 , wherein:
the first operation occurs when the processor is available; and
the second operation occurs when the processor is unavailable.
4. The integrated circuitry of claim 2 , wherein:
during the first operation, the processor fills at least a portion of the buffer with data copied from the buffer; and
during the second operation, the buffer controller fills at least a portion of the buffer with predetermined data.
5. The integrated circuitry of claim 1 , wherein:
the processing circuitry operates to fill at least a portion of the buffer with data copied from the buffer; and
the processing circuitry selects the data copied from the buffer so that a data pattern of data in the buffer is maintained.
6. The integrated circuitry of claim 5 , wherein:
additional data is received by the wireless interface intended for the buffer; and
the processing circuitry writes only a portion of the additional packetized data to the buffer so that the data pattern of data in the buffer is maintained.
7. The integrated circuitry of claim 1 , further comprising:
an output buffer operably coupled to the wireless interface that receives data from the processing circuitry and that transmits the data to the wireless interface;
an output buffer controller operably coupled to the output buffer and to the processing circuitry; and
wherein when the output buffer satisfies a buffer threshold, the processing circuitry and the output buffer controller cooperatively operate to fill at least a portion of the output buffer with data.
8. The integrated circuitry of claim 7 , wherein:
during a first operation when the output buffer satisfies the buffer threshold, the processing circuitry operates to fill at least a portion of the output buffer with data; and
during a second operation when the output buffer satisfies the buffer threshold, the output buffer controller operates to fill at least a portion of the output buffer with data.
9. The integrated circuitry of claim 8 , wherein:
the first operation occurs when the processing circuitry is available; and
the second operation occurs when the processing circuitry is unavailable.
10. The integrated circuitry of claim 8 , wherein:
during the first operation, the processing circuitry fills at least a portion of the output buffer with data copied from the output buffer; and
during the second operation, the output buffer controller fills at least a portion of the output buffer with predetermined data.
11. The integrated circuitry of claim 7 , wherein:
the processing circuitry operates to fill at least a portion of the output buffer with data copied from the output buffer; and
the processing circuitry selects the data copied from the output buffer so that an data pattern of data in the output buffer is maintained.
12. The integrated circuitry of claim 1 , wherein the wireless interface supports the Bluetooth Specification.
13. The integrated circuitry of claim 1 , wherein the processing circuitry is a microsequencer.
14. The integrated circuitry of claim 1 , wherein the data is received in Bluetooth Specification Synchronous Connection Oriented (SCO) data packets.
15. A method for processing data by a wireless device having a wireless interface, a buffer, and processing circuitry, the method comprising:
receiving data via the wireless interface;
writing the data to the buffer;
the processing circuitry determining that the buffer satisfies a buffer threshold indicating lost wireless data; and
when the buffer satisfies the buffer threshold, the processing circuitry filling at least a portion of the buffer with data having a data pattern consistent with data stored in the data buffer.
16. The method of claim 15 , wherein the data is received in Bluetooth Specification Synchronous Connection Oriented (SCO) data packets.
17. The method of claim 15 , wherein:
during a first operation when the buffer satisfies the buffer threshold, filling, by the processing circuitry, at least a portion of the buffer with data; and
during a second operation when the buffer satisfies the buffer threshold, filling, by a buffer controller, at least a portion of the buffer with data.
18. The method of claim 17 , wherein the first operation and the second operation occur at different times.
19. The method of claim 17 , wherein:
the first operation occurs when the processing circuitry is available; and
the second operation occurs when the processing circuitry is unavailable.
20. The method of claim 17 , wherein:
the first operation includes filling at least a portion of the buffer with data copied from the buffer; and
the second operation includes filling at least a portion of the buffer with predetermined data.
21. The method of claim 15 , wherein filling at least a portion of the buffer with data includes:
selecting a plurality of data packets from an occupied portion of the buffer;
copying the selected plurality of data packets to a vacant portion of the buffer; and
wherein the selected plurality of data packets are selected so that a data pattern of data is maintained in the buffer.
22. The method of claim 15 , further comprising:
receiving additional data by the wireless interface intended for the buffer; and
writing only a portion of the additional packetized data to the buffer so that the data pattern of data in the buffer is maintained.