System and a method for controlling at least one voltage converter having a plurality of cells in series
View Patent ↗A method of controlling at least one voltage converter having a plurality of cells in series, comprising an AC part and a DC part, characterized in that the AC input voltage (Vei) of each cell is determined directly by the use of a high speed current control loop relating to the AC part and a lower speed voltage control loop relating to the cells, the method including choosing the following voltage control law: Ψ i = C i 2 ( 2 R pi C i Z i + ⅆ ⅆ t Z i _ ref - K 1 Zi - K 2 Zi sign ( E Zi ) ) where: K 1zi and K 2zi are positive adjustment gains; Ci is the continuous capacitance of the capacitor Ci of each cell; R pi is the losses associated with each cell; Z i — ref is the reference value of Zi=(U DCi ) 2 , U DCi ; being the direct voltage across the capacitor C i ; and E Zi is such that E Zi =Z i −Z i — ref .
1. A control system for at least one voltage converter having a plurality of cells in series wherein a module and phase components of an input voltage Vei relative to a frame of reference (d, q) are delivered to each cell, comprising an AC part and a DC part, characterized in that it includes a high speed current control loop relating to the AC part that delivers a control voltage Ve, and a lower speed voltage control loop relating to the cells that delivers an active power ψi, such that:
Ψ
i
=
C
i
2
(
2
R
pi
C
i
Z
i
+
ⅆ
ⅆ
t
Z
i
_
ref
-
K
1
Zi
E
Zi
-
K
2
Zi
sign
(
E
Zi
)
)
where:
K 1zi and K 2zi are positive adjustment gains;
C i is a continuous capacitance of a capacitor Ci of each cell;
R pi is losses associated with each cell;
Z i — ref is a referenced value of Zi=(U DCi ) 2 , U DCi being a direct voltage across the capacitor C i ; and
E Zi is such that E Zi =Z i −Z i — ref ,
in that a link between these two control loops is obtained via a consumption of active power in the cells representing an output of the lower speed control loop,
in that it comprises means for obtaining a current reference i e — ref d for the high speed control loop, by effecting a summation Σψ i of the active power consumptions in N cells with
i
e
_
ref
d
=
∑
i
=
1
N
Ψ
i
-
V
e
q
i
e
_
ref
q
V
e
d
,
and by making use of a phase locked loop on the control voltage V e , and including a module for error correction in the phase locked loop, such that the control voltage Ve, which is a total output voltage component (Ve) of the AC part, is given by the following equation:
V
e
=
V
ePLL
+
K
PLL
∑
i
=
1
N
(
∫
0
1
E
Zi
ⅆ
t
)
where:
V ePLL is an output of the phase locked loop;
K
PLL
∑
i
=
1
N
(
∫
0
1
E
Zi
ⅆ
t
)
is a correction term;
K PLL is an adjustment gain; and
E Zi is an error in tracking a square of the DC voltage.
2. A system according to claim 1 , including a phase locked loop on the total output voltage component (Ve) of the AC part.
3. A system according to claim 1 including a module for delivering to the cells module and phase components relative to a frame of reference (d, q).
4. A system according to claim 1 , comprising a chain link STATCOM converter on each phase of a three-phase power distribution network.
5. A method of controlling at least one voltage converter having a plurality of cells in series, wherein a module and phase components of an input voltage Vei relative to a frame of reference (d, q) are delivered to each cell, comprising an AC part and a DC part, characterized in that the AC input voltage (Vei) of each cell is determined directly by a use of a high speed current control loop relating to the AC part that delivers a control voltage Ve and a lower speed voltage control loop relating to the cells that delivers an active power ψi, such that:
Ψ
i
=
C
i
2
(
2
R
pi
C
i
Z
i
+
ⅆ
ⅆ
t
Z
i
_
ref
-
K
1
Zi
E
Zi
-
K
2
Zi
sign
(
E
Zi
)
)
where:
K 1zi and K 2zi are positive adjustment gains;
C i is a continuous capacitance of a capacitor Ci of each cell;
R pi is losses associated with each cell;
Z i — ref is a referenced value of Zi=(U DCi ) 2 , U DCi being a direct voltage across the capacitor C i ; and
E Zi is such that E Zi =Z i −Z i —ref ,
in that a link between the two control loops is obtained via a consumption of active power in the cells representing an output of the lower speed control loop, and in that a current reference i e — ref d is derived for the high speed control loop, by effecting a summation Σψ i of the active power consumptions in N cells with
i
e
_
ref
d
=
∑
i
=
1
N
Ψ
i
-
V
e
q
i
e
_
ref
q
V
e
d
,
and by making use of a phase locked loop on the control voltage V e ; and wherein use is made of error correction in the phase locked loop, such that the control voltage, which is a total output voltage component (Ve) of the AC part, is given by the following equation:
V
e
=
V
ePLL
+
K
PLL
∑
i
=
1
N
(
∫
0
1
E
Zi
ⅆ
t
)
where:
V ePLL is an output of the phase locked loop;
K
PLL
∑
i
=
1
N
(
∫
0
1
E
Zi
ⅆ
t
)
is a correction term;
K PLL is an adjustment gain; and
E Zi is an error in tracking a square of the DC voltage.
6. A method according to claim 5 , including the use of a phase locked loop on the total output voltage component (Ve) of the AC part.
7. A method according to claim 5 , wherein a chain link STATCOM converter is used on each phase of a three-phase power distribution network.