Semiconductor chip
View Patent ↗A semiconductor wafer 10 has a plurality of semiconductor chip areas 10 a and a scribe area 10 b , each of the semiconductor chip areas 10 a having semiconductor elements and electrode pads (electrode portions) 16 a electrically connected to the respective semiconductor elements, the scribe area 10 b having monitor elements and electrode pads (electrode portions) 16 b electrically connected to the monitor elements, wherein projecting electrodes 18 are selectively formed only on the respective electrode pads 16 a in the semiconductor chip areas 10 a by electroless plating. Thus, for example, the electrode pads 16 b are covered with an insulating film 14.
1. A semiconductor chip comprising:
a substrate;
semiconductor elements formed on the substrate;
first electrode pads electrically connected to the respective semiconductor elements;
a first insulating film over the semiconductor elements, wherein the first insulating film includes first openings therein at locations of the first electrode pads; and
second electrode pads coplanar with the first electrode pads,
wherein the first insulating film is in direct contact with at least a part of each of the second electrode pads,
wherein the first insulating film further includes second openings therein at locations of the second electrode pads, and
wherein a side surface of at least one of the second electrode pads is exposed below the first insulating film.
2. The semiconductor chip according to claim 1 , further comprising projecting electrodes on only the first electrode pads, wherein the projecting electrodes directly contact the first electrode pads.
3. The semiconductor chip according to claim 1 , wherein the first electrode pads are larger than the second electrode pads.
4. The semiconductor chip according to claim 1 , wherein the first electrode pads are arranged in two lines.
5. The semiconductor chip according to claim 1 , wherein the first electrode pads are Al.
6. The semiconductor chip according to claim 1 , wherein the second electrode pads are Al.
7. The semiconductor chip according to claim 1 , wherein a top surface of each of the second electrode pads is exposed through the second opening in the first insulating film.
8. The semiconductor chip according to claim 1 , wherein a metal layer different from that in a surface layer of each of the first electrode pads is in a surface layer of each of the second electrode pads.
9. The semiconductor chip according to claim 1 , wherein a Cu layer is at predetermined first and second electrode pads, and an Al layer is on the Cu layer of only the first electrode pads.
10. The semiconductor chip according to claim 1 , wherein a Cu layer is at predetermined first and second electrode pads, and an Al layer is on the Cu layer of only the second electrode pads.