Method of manufacturing semiconductor memory device

1. A semiconductor device comprising:

a semiconductor substrate;

a non-volatile semiconductor memory element formed over the semiconductor substrate, including a variable resistance element including a laminate comprising a first electrode, a variable resistance layer, and a second electrode; and

a volatile semiconductor memory element formed over the semiconductor substrate, including a capacitance element including a laminate comprising a third electrode, a dielectric layer including a same material as the variable resistance layer, and a fourth electrode.

2. The semiconductor device according to claim 1 , wherein either one of the first electrode or the second electrode includes a same material as the third electrode and the fourth electrode.

3. The semiconductor device according to claim 2 , wherein the other one of the first electrode or the second electrode includes a different material than the third electrode and the fourth electrode.

4. The semiconductor device according to claim 1 , wherein the fourth electrode is laminated on the second electrode.

5. The semiconductor device according to claim 1 , wherein a material that constitutes the dielectric layer and the variable resistance layer includes any one or a mixture of a transition metal oxide, an aluminum oxide, and a silicone oxide.

6. The semiconductor device according to claim 5 , wherein the transition metal oxide consists of any one or a mixture of tantalum oxide, niobium oxide, hafnium oxide, and zirconium oxide.

7. The semiconductor device according to claim 1 , wherein the third electrode and the fourth electrode and either one of the first electrode and the second electrode include any of tungsten, titanium, platinum, and gold.

8. The semiconductor device according to claim 7 , wherein the other one of the first electrode or the second electrode includes any of silver, copper, and zinc.

9. The semiconductor device according to claim 1 , wherein the non-volatile semiconductor memory element includes a first selection transistor, the variable resistance element is connected to the first selection transistor, the volatile semiconductor memory element includes a second selection transistor, and the capacitance element is connected to the second selection transistor.

10. A semiconductor device comprising:

a semiconductor substrate;

a first selection transistor formed over the semiconductor substrate;

a second selection transistor formed over the semiconductor substrate;

a variable resistance element including a laminate comprising a first electrode that is connected to the first selection transistor, a variable resistance layer, and a second electrode; and

a capacitance element including a laminate comprising a third electrode that is connected to the second selection transistor, a dielectric layer including a same material as the variable resistance layer, and a fourth electrode.

11. The semiconductor device according to claim 10 , wherein the semiconductor substrate includes thereon a non-volatile semiconductor memory element and a volatile semiconductor memory element,

the non-volatile semiconductor memory element including the first selection transistor and the variable resistance element that is connected to the first selection transistor, and

the volatile semiconductor memory element including the second selection transistor and the capacitance element that is connected to the second selection transistor.

12. A data processing system comprising:

a semiconductor device; and

a processor,

wherein between the processor and the semiconductor device, a data transfer is performed,

wherein the semiconductor device comprises:

a semiconductor substrate;

a non-volatile semiconductor memory element formed over the semiconductor substrate, including a variable resistance element including a laminate comprising a first electrode, a variable resistance layer, and a second electrode; and

a volatile semiconductor memory element formed over the semiconductor substrate, including a capacitance element including a laminate comprising a third electrode, a dielectric layer including a same material as the variable resistance layer, and a fourth electrode.

13. The data processing system according to claim 12 , wherein either one of the first electrode or the second electrode includes a same material as the third electrode and the fourth electrode.

14. The data processing system according to claim 13 , wherein the other one of the first electrode or the second electrode includes a different material than the third electrode and the fourth electrode.

15. The data processing system according to claim 12 , wherein the fourth electrode is laminated on the second electrode.

16. The data processing system according to claim 12 , wherein a material that constitutes the dielectric layer and the variable resistance layer includes any one or a mixture of a transition metal oxide, an aluminum oxide, and a silicone oxide.

17. The data processing system according to claim 16 , wherein the transition metal oxide consists of any one or a mixture of tantalum oxide, niobium oxide, hafnium oxide, and zirconium oxide.

18. The data processing system according to claim 12 , wherein the third electrode and the fourth electrode and either one of the first electrode and the second electrode include any of tungsten, titanium, platinum, and gold.

19. The data processing system according to claim 18 , wherein the other one of the first electrode or the second electrode includes any of silver, copper, and zinc.

20. The data processing system according to claim 12 , wherein the non-volatile semiconductor memory element includes a first selection transistor, the variable resistance element is connected to the first selection transistor, the volatile semiconductor memory element includes a second selection transistor, and the capacitance element is connected to the second selection transistor.

21. A semiconductor device comprising:

a semiconductor substrate;

a non-volatile semiconductor memory element formed over the semiconductor substrate, including a programmable element including a laminate comprising a first electrode, a recording layer, and a second electrode, the programmable element having a first state and a second state, the programmable element having a first resistance value in the first state and a second resistance value that is different from the first resistance value in the second state; and

a volatile semiconductor memory element formed over the semiconductor substrate, including a capacitance element including a laminate comprising a third electrode, a dielectric layer including a same material as the recording layer, and a fourth electrode,

wherein the material comprises Al and a transition metal oxide.

22. A data processing system comprising:

a semiconductor device; and

a processor;

wherein between the processor and the semiconductor device, a data transfer is performed,

wherein the semiconductor device comprises:

a semiconductor substrate;

a non-volatile semiconductor memory element formed over the semiconductor substrate, including a programmable element including a laminate comprising a first electrode, a recording layer, and a second electrode, the programmable element having a first state and a second state, the programmable element having a first resistance value in the first state and a second resistance value that is different from the first resistance value in the second state; and

a volatile semiconductor memory element formed over the semiconductor substrate, including a capacitance element including a laminate comprising a third electrode, a dielectric layer including a same material as the recording layer, and a fourth electrode,

wherein the material comprises Al and a transition metal oxide.