IP Library Granted Patent US 9,064,059
Granted Patent B2
US 9,064,059 · App. 13/146,427 · Granted Jun 23, 2015

Controller for solid state disk, which controls simultaneous switching of pads

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Quick Facts
Patent No.
US 9,064,059
App. No.
13/146,427
Granted
Jun 23, 2015
Kind
B2
Abstract

Provided is a controller for a solid state disk, to control simultaneous switching of pads. The controller for the solid state disk may control simultaneous switching of a plurality of output pads or a plurality of input pads that correspond to a plurality of channels. In particular, the controller may properly delay signals driven to the output pads or input pads, to reduce power supplied to the pads, and to prevent ground bouncing, as well as, maintain a quality of signals.

Claims (32)

1. A controller for a solid state disk, the controller comprising:

a control module to generate a control signal, the control signal being used to read data stored in a plurality of solid state disks; and

a disk interface module to communicate with the plurality of solid state disks via a plurality of channels, and to provide read signals to a plurality of output pads in response to the control signal, each of the plurality of output pads being individually dedicated to one of to the plurality of channels,

wherein the disk interface module comprises a simultaneous switching prevention module to control the timing of at least one of the read signals provided to at least one of the plurality of output pads and thereby limit the number of output pads that are simultaneously switched in logic levels.

2. The controller of claim 1 , wherein the simultaneous switching prevention module controls at least one of the read signals, so that a number of output pads simultaneously switched among the plurality of output pads is equal to or less than a preset number.

3. The controller of claim 2 , wherein the simultaneous switching prevention module sequentially determines whether the plurality of output pads are simultaneously switched, and controls the number of output pads simultaneously switched among the plurality of output pads.

4. The controller of claim 1 , wherein the simultaneous switching prevention module delays at least one of the read signals.

5. The controller of claim 1 , further comprising:

a host interface module to communicate with a host, the host desiring to read the data stored in the plurality of solid state disks.

6. The controller of claim 1 , wherein the read signals provided to the plurality of output pads corresponding to the plurality of channels are independent of each other.

7. The controller of claim 1 , wherein the plurality of solid state disks are on a non-volatile memory device.

8. A controller for a solid state disk, the controller comprising:

a control module to generate a control signal, the control signal being used to write data on a plurality of solid state disks; and

a disk interface module to communicate with the plurality of solid state disks via a plurality of channels, and to provide write signals to a plurality of output pads in response to the control signal, each of the plurality of output pads being individually dedicated to one of the plurality of channels,

wherein the disk interface module comprises a simultaneous switching prevention module to control the timing of at least one of the write signals provided to at least one of the plurality of output pads and thereby limit the number of output pads that are simultaneously switched in logic levels.

9. The controller of claim 8 , wherein the simultaneous switching prevention module controls at least one of the write signals, so that a number of output pads simultaneously switched among the plurality of output pads is equal to or less than a preset number.

10. A controller for a solid state disk, the controller comprising:

a plurality of solid state disks to store data; and

a disk interface module to receive input control signals via a plurality of channels, the input control signals being associated with the data stored in the plurality of solid state disks,

wherein the disk interface module comprises a simultaneous switching prevention module to adjust the timing of at least one input control signal among the input control signals, and to provide the at least one input control signal to a plurality of input pads corresponding to the plurality of channels thereby limit the number of input pads that are simultaneously switched in logic levels, each of the plurality of input pads being individually dedicated to one of the plurality of channels.

11. A controller for a solid state disk, the controller comprising:

a control module to read data stored in a plurality of solid state disks, and to generate a control signal, the control signal being used to write the data on the plurality of solid state disks; and

a disk interface module to provide output control signals to a plurality of output pads in response to the control signal, and to receive input control signals via a plurality of input pads, each of the plurality of output pads being individually dedicated to one of a plurality of channels, and the input control signals being associated with the data stored in the plurality of solid state disks,

wherein the disk interface module comprises a simultaneous switching prevention module to control the timing of the output control signals or the input control signals provided to at least one of the plurality of output pads and input pads, respectively, and thereby limit the number of output pads or input pads that are simultaneously switched in logic levels.

12. The controller of claim 11 , wherein the simultaneous switching prevention module controls the output control signals or the input control signals, so that a number of pads simultaneously switched among the plurality of output pads and the plurality of input pads is equal to or less than a preset number.

13. The controller of claim 11 , wherein the simultaneous switching prevention module controls the output control signals or the input control signals, so that a clock is changed where at least one pad among the plurality of output pads and the plurality of input pads is switched.

14. The controller of claim 12 , wherein the simultaneous switching prevention module sequentially determines whether the plurality of output pads or input pads are simultaneously switched, and controls the number of output pads or input pads simultaneously switched among the plurality of output pads or input pads.

15. The controller of claim 11 , wherein the simultaneous switching prevention module delays at least one of the output control signals or the input control signals.

16. The controller of claim 11 , further comprising:

a host interface module to communicate with a host, the host desiring to read the data stored in the plurality of solid state disks or write data to the plurality of solid state disks.

17. The controller of claim 11 , wherein the read signals provided to the plurality of output pads corresponding to the plurality of channels are independent of each other.

18. The controller of claim 11 , wherein the plurality of solid state disks are on a non-volatile memory device.

Assignments (15)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2017
From: TOSHIBA CORPORATION
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043620/0430 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2016
From: OCZ STORAGE SOLUTIONS, INC.
To: TOSHIBA CORPORATION
Reel/Frame 038434/0371 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2016
From: INDILINX CO. LTD.
To: TOSHIBA CORPORATION
Reel/Frame 038285/0490 →
RELEASE OF SECURITY INTEREST BY BANKRUPTCY COURT ORDER (RELEASES REEL/FRAME 031611/0168) Recorded Apr 8, 2014
From: COLLATERAL AGENTS, LLC
To: OCZ TECHNOLOGY GROUP, INC.
Reel/Frame 032640/0455 →
RELEASE OF SECURITY INTEREST BY BANKRUPTCY COURT ORDER (RELEASES REEL/FRAME 030092/0739) Recorded Apr 8, 2014
From: HERCULES TECHNOLOGY GROWTH CAPITAL, INC.
To: OCZ TECHNOLOGY GROUP, INC.
Reel/Frame 032640/0284 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE AND ATTACH A CORRECTED ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED ON REEL 032365 FRAME 0920. ASSIGNOR(S) HEREBY CONFIRMS THE THE CORRECT EXECUTION DATE IS JANUARY 21, 2014. Recorded Mar 18, 2014
From: OCZ TECHNOLOGY GROUP, INC.
To: TAEC ACQUISITION CORP.
Reel/Frame 032461/0486 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2014
From: OCZ TECHNOLOGY GROUP, INC.
To: TAEC ACQUISITION CORP.
Reel/Frame 032365/0920 →
CHANGE OF NAME Recorded Feb 27, 2014
From: TAEC ACQUISITION CORP.
To: OCZ STORAGE SOLUTIONS, INC.
Reel/Frame 032365/0945 →
SECURITY AGREEMENT Recorded Nov 11, 2013
From: OCZ TECHNOLOGY GROUP, INC.
To: COLLATERAL AGENTS, LLC
Reel/Frame 031611/0168 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: INDILINX CO., LTD.
To: OCZ TECHNOLOGY GROUP, INC.
Reel/Frame 030798/0799 →
SECURITY AGREEMENT Recorded Mar 27, 2013
From: OCZ TECHNOLOGY GROUP, INC.
To: HERCULES TECHNOLOGY GROWTH CAPITAL, INC.
Reel/Frame 030092/0739 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2011
From: KIM, YOUNG-GOAN
To: INDILINX CO., LTD
Reel/Frame 026656/0167 →