IP Library Granted Patent US 8,712,203
Granted Patent B2
US 8,712,203 · App. 13/148,166 · Granted Apr 29, 2014

Formation of an optical waveguide

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Quick Facts
Patent No.
US 8,712,203
App. No.
13/148,166
Granted
Apr 29, 2014
Kind
B2
Abstract

Technologies are generally described for an optical waveguide, methods and systems effective to form an optical waveguide, and an optical system including an optical waveguide. In some examples, the optical waveguide may include a silicon oxynitride region in a wall of the silicon substrate. The silicon oxynitride region may define an inner region of the optical waveguide. The wall may define a via. The optical waveguide may include a silicon oxide region in the substrate. The silicon oxide region may define an outer region of the optical waveguide adjacent to the inner region.

Claims (39)

1. An optical waveguide formed in a silicon substrate, the optical waveguide comprising:

a silicon oxynitride region in a wall of the silicon substrate, wherein the silicon oxynitride region defines an inner region of the optical waveguide and wherein the wall defines a via; and

a silicon oxide region in the substrate, wherein the silicon oxide region defines an outer region of the optical waveguide adjacent to the inner region.

2. The optical waveguide of claim 1 , wherein the outer region is between the inner region and silicon of the silicon substrate.

3. The optical waveguide of claim 1 , wherein the inner region includes an annular cross-section.

4. The optical waveguide of claim 3 , further comprising a polymeric resin in the inner region.

5. A method of forming an optical waveguide in a silicon substrate, the method comprising:

forming a silicon oxynitride region in a wall of the silicon substrate, wherein the silicon oxynitride region defines an inner region of the optical waveguide, and wherein the wall defines a via; and

forming a silicon oxide region in the silicon substrate, wherein the silicon oxide region defines an outer region of the optical waveguide adjacent to the inner region.

6. The method of claim 5 , further comprising forming the via in the silicon substrate.

7. The method of claim 5 , further comprising forming a via in the silicon substrate by performing at least one of laser drilling, reactive ion etching, plasma etching, ion beam milling, or electrochemical etching.

8. The method of claim 5 , further comprising forming the inner region by reacting the silicon substrate with a gas including nitrogen, in a reaction chamber.

9. The method of claim 8 , wherein the gas includes a gas selected from a group consisting of nitrous oxide, ammonia, and nitrogen/oxygen mixtures.

10. The method of claim 8 , wherein the reaction conditions include a temperature in a range of from about 1000 degrees Celsius to about 1500 degrees Celsius.

11. The method of claim 5 , further comprising forming the outer region by reacting the silicon substrate with a gas including oxygen, in a reaction chamber.

12. The method of claim 5 , further comprising:

forming the inner region by reacting the silicon substrate with a first gas including nitrogen, in a reaction chamber; and

forming the outer region by reacting the silicon substrate with a second gas including oxygen, in the reaction chamber.

13. The method of claim 5 , further comprising forming the outer region prior to forming the inner region.

14. The method of claim 5 , further comprising forming the inner region prior to forming the outer region.

15. The method of claim 13 , further comprising forming the inner region by at least one of chemical vapor deposition or plasma vapor deposition.

16. An optical communication system including an optical waveguide formed in a silicon substrate, the optical communication system comprising:

an optical signal transmitter; and

an optical signal receiver, wherein the optical signal receiver is configured to be in communication with the optical signal transmitter through the optical waveguide; and

wherein the optical waveguide includes:

a silicon oxynitride region in a wall of the silicon substrate, wherein the silicon oxynitride region defines an inner region of the optical waveguide and wherein the wall defines a via; and

a silicon oxide region in the silicon substrate, wherein the silicon oxide region defines an outer region of the optical waveguide adjacent to the inner region.

17. The optical communication system of claim 16 , wherein the silicon substrate includes an integrated circuit configured to be in communication with the optical signal transmitter.

18. A system effective to form an optical waveguide in a silicon wafer, wherein the wafer includes a wall that defines a via, the system comprising:

a reaction chamber;

a first source of a first gas, wherein the first gas includes nitrogen, and wherein the first source is configured to be in communication with the reaction chamber;

a second source of a second gas, wherein the second gas includes oxygen, and wherein the second source is configured to be in communication with the reaction chamber;

a heat source, wherein the heat source is operatively associated with the reaction chamber;

a processor, wherein the processor is configured to be in communication with the reaction chamber, the first source, the second source, and the heat source, and wherein the processor is configured to operate the first source, second source, and the heat source so as to

form a silicon oxynitride region in the wall of the silicon substrate, wherein the silicon oxynitride region defines an inner region of the optical waveguide; and

form a silicon oxide region in the substrate, wherein the silicon oxide region defines an outer region of the optical waveguide adjacent to the inner region.

19. The system of claim 18 , further comprising a via forming apparatus,

wherein the processor is configured to be in communication with the via forming apparatus.

20. The system of claim 19 , wherein the via forming apparatus includes at least one of a laser drilling apparatus, a reactive ion etching apparatus, a plasma etching apparatus, an ion beam milling apparatus, or an electrochemical etching apparatus.

Assignments (1)
SECURITY INTEREST Recorded Jan 29, 2019
From: EMPIRE TECHNOLOGY DEVELOPMENT LLC
To: CRESTLINE DIRECT FINANCE, L.P.
Reel/Frame 048373/0217 →