Method and apparatus for wireless broadband systems direct data transfer

1. An apparatus for direct data transfer in a wireless broadband system having an operating system, the apparatus comprising:

a central processing unit (CPU);

a first command First In First Out (FIFO) coupled to the CPU and configured to receive read commands from the CPU;

a local read FIFO coupled to the first command FIFO for holding received data until the CPU requests the received data;

a first direct memory access (DMA) unit coupled to the local read FIFO and the first command FIFO, wherein the first DMA unit is dedicated for reading data and wherein the first command FIFO is configured to transfer the read commands in sequence to the first DMA unit, in the absence of intervention by the operating system;

a second command FIFO coupled to the CPU and configured to receive write commands from the CPU;

a local write FIFO coupled to the second command FIFO for holding data sent by the CPU for writing to a remote unit; and

a second DMA unit coupled to the local write FIFO and the second command FIFO, wherein the second DMA unit is dedicated for writing data sent by the CPU and wherein the second command FIFO is configured to transfer write commands in sequence to the second DMA unit, in the absence of intervention by the operating system.

2. The apparatus according to claim 1 , further comprising:

an offset table including a plurality of offsets; and

an address generation unit in the first DMA unit configured to generate or calculate addresses from a base and at least one offset from the offset table for accessing the local read FIFO.

3. The apparatus according to claim 1 , further comprising:

a hardware unit coupled to the first DMA unit, wherein the hardware unit is configured to receive a signal for initiating a transaction between the hardware unit and the first DMA unit.

4. The apparatus according to claim 1 , further comprising a read bus master and a write bus master coupling the first DMA unit to at least one remote unit.

5. The apparatus according to claim 1 , further comprising a read bus master and a write bus master coupling the second DMA unit to at least one remote unit.

6. The apparatus according to claim 2 , further comprising a read bus master and a write bus master coupling the first DMA unit to at least one remote unit.

7. The apparatus according to claim 3 , further comprising a read bus master and a write bus master coupling the second DMA unit to at least one remote unit.

8. The apparatus of claim 1 , wherein the local read FIFO is configured to hold received data until the CPU requests the received data, and wherein the local write FIFO is configured to hold data sent by the CPU for writing to a remote unit.

9. A method for direct data transfer in a wireless broadband system, the method comprising:

receiving at least one read command from a central processing unit (CPU) at a first command First In First Out (FIFO) coupled to the CPU;

storing received data at a local read FIFO coupled to the first command FIFO until the CPU requests the received data;

reading, by a first direct memory access (DMA) unit coupled to the local read FIFO and the first command FIFO, received data according to the at least one read command, wherein the first command FIFO is configured to transfer the read commands in sequence to the first DMA unit, in the absence of intervention by the operating system;

receiving at least one write command from the CPU at a second command FIFO coupled to the CPU;

storing written data at a local write FIFO coupled to the second command FIFO until the CPU requests the written data; and

writing, by a second DMA unit coupled to the local write FIFO and the second command FIFO, written data according to the at least one write command, wherein the second command FIFO is configured to transfer the write commands in sequence to the second DMA unit, in the absence of intervention by the operating system.

10. The method according to claim 9 , further comprising:

providing a base address to the first DMA unit; and

calculating, in the first DMA unit, a plurality of addresses in a data memory from the base and a plurality of offsets in an offset table.

11. The method of claim 9 , further comprising:

storing received data at a local read FIFO coupled to the first command FIFO until the CPU requests the received data; and

storing written data at a local write FIFO coupled to the second command FIFO until the CPU requests the written data.

12. An apparatus for direct data transfer in a wireless broadband system, comprising:

means for receiving at least one read command from a central processing unit (CPU) at a first command First In First Out (FIFO) coupled to the CPU;

means for storing received data at a local read FIFO coupled to the first command FIFO until the CPU requests the received data;

means for reading, by a first direct memory access (DMA) unit coupled to the local read FIFO and the first command FIFO, received data according to the at least one read command, wherein the first command FIFO is configured to transfer the read commands in sequence to the first DMA unit, in the absence of intervention by the operating system;

means for receiving at least one write command from the CPU at a second command FIFO coupled to the CPU;

means for storing written data at a local write FIFO coupled to the second command FIFO until the CPU requests the written data; and

means for writing, by a second DMA unit coupled to the local write FIFO and the second command FIFO, written data according to the at least one write command, wherein the second command FIFO is configured to transfer the write commands in sequence to the second DMA unit, in the absence of intervention by the operating system.

13. The apparatus according to claim 12 , further comprising:

means for providing a base address to the first DMA unit; and

means for calculating, in the first DMA unit, a plurality of addresses in a data memory from the base and a plurality of offsets in an offset table.

14. The apparatus according to claim 12 , further comprising:

means for storing received data at a local read FIFO coupled to the first command FIFO until the CPU requests the received data; and

means for receiving at least one write command from the CPU at a second command FIFO coupled to the CPU.