Power converter package structure and method
An embodiment power converter package comprises a semiconductor die, an output inductor, a plurality of input capacitors and output capacitors. The semiconductor die, the output inductor and the plurality of capacitors are mounted on a lead frame and connected one to another through various pads on the lead frame. The semiconductor die comprises a high side switch, a low side switch and a driver. The power converter package is electrically coupled to an external pulse width modulation controller through a variety of input and output pads.
1. A structure comprising:
a first semiconductor die mounted on a lead frame, wherein the first semiconductor die is electrically coupled to a regulator controller located outside the structure, wherein the first semiconductor die comprises:
a high side switch comprising:
a first drain coupled to the plurality of input capacitors;
a first gate coupled to a driver; and
a first source;
a low side switch comprising:
a second drain coupled to the first source;
a second gate coupled to the driver; and
a second source coupled to ground; and
the driver comprising:
an input terminal coupled to the regulator controller located outside the structure; and
various outputs coupled to the high side switch and the low side switch;
an inductor mounted on the lead frame, wherein the inductor is coupled to the first semiconductor die through a plurality of power pads on the lead frame;
a plurality of input capacitors mounted on the lead frame, wherein the plurality of input capacitors are coupled to the first semiconductor die; and
a plurality of output capacitors mounted on the lead frame, wherein the plurality of output capacitors are coupled to the first semiconductor die.
2. The structure of claim 1 , wherein the plurality of output capacitors and the inductor form an output filter.
3. The structure of claim 1 , wherein the plurality of input capacitors are configured to maintain a dc voltage at an input terminal of the structure.
4. The structure of claim 1 , further comprising:
a plurality of small signal capacitors mounted on the lead frame, wherein the plurality of small signal capacitors are coupled to the first semiconductor die; and
a plurality of small signal resistors mounted on the lead frame, wherein the plurality of small signal resistors are coupled to the first semiconductor die.
5. The structure of claim 1 , wherein the first semiconductor die comprises circuitry converting an input voltage to a reference voltage, wherein the reference voltage is used to provide a reference voltage level for a driver in the first semiconductor die.
6. The structure of claim 5 , wherein the circuitry is a regulator selected from the group consisting of a buck converter, a linear regulator, and a switching capacitor regulator.
7. A structure comprising:
a semiconductor die on a lead frame, wherein the semiconductor die is electrically coupled to a controller, wherein the semiconductor die comprises:
a high side switch comprising:
a first drain coupled to the plurality of input capacitors;
a first gate coupled to a driver; and
a first source;
a low side switch comprising:
a second drain coupled to the first source;
a second gate coupled to the driver; and
a second source coupled to ground; and
the driver comprising:
an input terminal coupled to the regulator controller located outside the structure; and
various outputs coupled to the high side switch and the low side switch;
an inductor on the lead frame, wherein the inductor is coupled to the semiconductor die through a phase pad on the lead frame;
a plurality of input capacitors on the lead frame, wherein the plurality of input capacitors are coupled to the semiconductor die; and
a plurality of output capacitors on the lead frame, wherein the plurality of output capacitors are coupled to the semiconductor die.
8. The structure of claim 7 , wherein:
the plurality of input capacitors are coupled between a Vin pad and a ground pad.
9. The structure of claim 7 , wherein:
the plurality of output capacitors are coupled between a Vo pad and a ground pad.
10. The structure of claim 7 , further comprising:
a reference capacitor coupled to a reference pad of the lead frame.
11. The structure of claim 7 , further comprising:
a bootstrap capacitor coupled to the phase pad of the lead frame.
12. The structure of claim 7 , wherein:
the semiconductor die comprises switches of a buck dc-dc converter.
13. The structure of claim 7 , wherein:
the semiconductor die is mounted on the lead frame through a conductive adhesive material.
14. A structure comprising:
a semiconductor die on a lead frame, wherein the semiconductor die comprises:
a high side switch comprising:
a first drain coupled to the plurality of input capacitors;
a first gate coupled to a driver; and
a first source;
a low side switch comprising:
a second drain coupled to the first source;
a second gate coupled to the driver; and
a second source coupled to ground; and
the driver comprising:
an input terminal coupled to the regulator controller located outside the structure; and
various outputs coupled to the high side switch and the low side switch;
an inductor on the lead frame, wherein the inductor is coupled to the semiconductor die through a phase pad on the lead frame;
a plurality of input capacitors on the lead frame, wherein the plurality of input capacitors are coupled to the semiconductor die; and
a plurality of output capacitors on the lead frame, wherein the plurality of output capacitors are coupled to the semiconductor die.
15. The structure of claim 14 , wherein:
the lead frame is formed of thermally and electrically conductive materials.
16. The structure of claim 14 , wherein:
the lead frame is formed through a stamping and etching process.
17. The structure of claim 14 , wherein:
the lead frame comprises a plurality of small signal pads.
18. The structure of claim 14 , wherein:
the lead frame comprises a plurality of power pads.