IP Library Patent Application 13156363
Patent Application
App. No. 13/156,363

Surge Protection Circuit

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Quick Facts
Patent No.
US None
App. No.
13/156,363
Abstract

The present invention discloses a surge protection circuit for a line driver. The surge protection circuit includes a transistor, including a first terminal coupled to a positive output pad of the line driver and a second terminal coupled to a negative output pad of the line driver, an inverter, including an output terminal coupled to a third terminal of the transistor, and a first RC circuit, including a resistor having a terminal coupled to an input terminal of the inverter and another terminal coupled to a power supply, and a capacitor having a terminal coupled to the input terminal of the inverter and another terminal coupled to a ground. A first RC time constant of the first RC circuit is substantially equal to or greater than a period of a differential mode surge signal.

Claims (11)

1 . A surge protection circuit for a line driver of a communication system, comprising:

a transistor, comprising a first terminal, a second terminal and a third terminal, and the first terminal coupled to a positive output pad of the line driver, the second terminal coupled to a negative output pad of the line driver;

an inverter, comprising an input terminal and an output terminal, the output terminal coupled to the third terminal of the transistor; and

a first RC delay circuit, comprising:

a resistor having a terminal coupled to an input terminal of the inverter, and another terminal coupled to a power supply; and

a capacitor having a terminal coupled to the input terminal of the inverter and another terminal coupled to a ground,

wherein a first RC time constant of the first RC circuit is substantially greater than or equal to a period of a differential mode surge signal.

2 . The surge protection circuit of claim 1 , wherein the transistor is turned off if the differential mode surge signal is not applied on the positive output pad and the negative output pad.

3 . The surge protection circuit of claim 1 , wherein the transistor is turned on to form a discharge path between the positive output pad and the negative output pad if the differential mode surge signal is applied on the positive output pad and the negative output pad.

4 . The surge protection circuit of claim 1 , wherein the communication system further comprises an electrostatic discharge (ESD) protection circuit, for performing electrostatic discharge protection, having a second RC time constant of a second RC circuit less than the period of the differential mode surge signal.

5 . The surge protection circuit of claim 1 , wherein the communication system is an asymmetric digital subscriber line (ADSL) system, a very high bitrate digital subscriber line (VDSL) system or a power line communication (PLC) system.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2011
From: LI, HSIN-HSIEN; CHU, YU-LIN; CHIU, LI-YU
To: RALINK TECHNOLOGY CORP.
Reel/Frame 026413/0560 →