DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
A display substrate includes a gate line and a data line disposed on a base substrate. A switching element is connected to the gate line and the data line. A first pixel electrode is connected to the switching element, and a second pixel electrode is disposed on the first pixel electrode. The first pixel electrode includes first sub-electrodes that are separated by a first slit pattern. The second pixel electrode includes second sub-electrodes that are separated by a second slit pattern and extend across the first sub-electrodes. Therefore, a capacitance of a storage capacitor formed of overlapped portions of the first and second pixel electrodes is reduced, such that the charging rate of the storage capacitor is increased.
1 . A display substrate comprising:
a base substrate comprising a pixel area;
a gate line disposed on the base substrate and extending in a first direction;
a data line disposed on the base substrate and extending across the gate line in a second direction;
a switching element disposed on the base substrate and connected to the gate line and the data line;
a first pixel electrode disposed in the pixel area and connected to the switching element, the first pixel electrode comprising first sub-electrodes spaced apart from each other by a slit pattern; and
a second pixel electrode comprising second sub-electrodes spaced apart from each other by a slit pattern, the second sub-electrodes extending across the first sub-electrodes.
2 . The display substrate of claim 1 , wherein:
the first pixel electrode further comprises a first peripheral electrode surrounding and connected to the first sub-electrodes; and
the second pixel electrode further comprises a second peripheral electrode surrounding and connected to the second sub-electrodes.
3 . The display substrate of claim 1 , wherein the first sub-electrodes extend parallel to each other at an angle of about 0° to about 15°, with respect to the first direction or the second direction.
4 . The display substrate of claim 1 , wherein the second sub-electrodes extend parallel to each other at angle of about 0° to about 15°, with respect to the first direction or the second direction.
5 . The display substrate of claim 1 , wherein a crossing angle of the first sub-electrodes and the second sub-electrodes is more than about 0° and less than about 30°.
6 . The display substrate of claim 1 , further comprising a common line disposed on the base substrate, extending in the first direction, and connected to the second pixel electrode.
7 . The display substrate of claim 6 , further comprising an insulating layer disposed between the first pixel electrode and the second pixel electrode and comprising a contact hole exposing the common line,
wherein the second pixel electrode is connected to the common line through the contact hole.
8 . The display substrate of claim 7 , wherein the first pixel electrode is connected to a contact portion extending from the switching element.
9 . The display substrate of claim 1 , wherein the width of each of the first sub-electrodes is about 2 μm to about 20 μm, and the width of each of the second sub-electrodes is from about 2 μm to about 20 μm.
10 . The display substrate of claim 1 , wherein the pitch of the first sub-electrodes is about 5 μm to about 30 μm, and the pitch of the second sub-electrodes is from about 5 μm to about 30 μm.
11 . The display substrate of claim 1 , wherein:
the pixel area is divided into a first portion and a second portion;
the first sub-electrodes are each disposed in one of the first portion and the second portion;
the first sub-electrodes disposed in the first portion have a positive slope, with respect to the first direction or the second direction; and
the first sub-electrodes disposed in the second portion have a negative slope, with respect to the first direction or the second direction.
12 . The display substrate of claim 11 , wherein:
the second sub-electrodes are each disposed in one of the first portion and the second portion;
the second sub-electrodes disposed in the first portion have a positive slope, with respect to the first direction or the second direction; and
the second sub-pixel electrodes disposed in the second portion have a negative slope, with respect to the first direction or the second direction.
13 . A method for manufacturing a display substrate, the method comprising:
forming a gate line and a data line on a base substrate, the gate line extending in a first direction and the data line extending in a second direction across the gate line;
forming a switching element on the base substrate and connected to the gate line and the data line;
forming a first pixel electrode on a pixel area of the base substrate, the first pixel electrode being connected to the switching element and comprising first sub-electrodes and a first peripheral electrode surrounding and connected to the first sub-electrodes; and
forming a second pixel electrode comprising second sub-electrodes that extend across the first sub-electrodes, and a second peripheral electrode surrounding and connected to the second sub-electrodes.
14 . The method of claim 13 , wherein the forming of the switching element comprises:
forming a first metal layer on the base substrate;
forming a first conductive pattern by patterning the first metal layer, the first conductive pattern comprising the gate line, and a gate electrode connected to the gate line;
forming a second metal layer on the first conductive pattern; and
forming a second conductive pattern by patterning the second metal layer, the second conductive pattern comprising the data line, a source electrode connected to the data line, a drain electrode, and a contact portion extending from the drain electrode.
15 . The method of claim 14 , wherein the forming of the first pixel electrode comprises:
forming a first transparent conductive layer on the second conductive pattern; and
patterning the first transparent conductive layer to form the first pixel electrode.
16 . The method of claim 14 , further comprising forming an active layer on the base substrate before the forming of the second metal layer,
wherein an active pattern is formed under the second conductive pattern.
17 . The method of claim 14 , wherein the forming of the first conductive pattern comprises forming a common line on the base substrate that extends parallel with the gate line.
18 . The method of claim 17 , further comprising:
forming an insulating layer on the first pixel electrode; and
forming a contact hole in the insulating layer to expose the common line.
19 . The method of claims 18 , wherein the forming of the second pixel electrode comprises:
forming a second transparent conductive layer on the insulating layer and in the contact hole; and
patterning the second transparent conductive layer to form the second pixel electrode, the second pixel electrode being connected to the common line through the contact hole.
20 . The method of claim 13 , wherein a crossing angle of the first sub-electrodes and the second sub-electrodes is more than about 0° and less than about 30°.
21 . The method of claim 13 , wherein the first sub-electrodes extend in parallel to each other at an angle of about 0° to about 15°, with respect to the first direction or the second direction; and
the second sub-electrodes extend in parallel to each other at an angle of from about 0° to about 15°, with respect to the first direction or the second direction.