Semiconductor device and control method thereof

1. A semiconductor device comprising:

first and second power-supply circuits;

a first internal circuit coupled to the first power-supply circuit through a first power line;

a second internal circuit coupled to the second power-supply circuit through a second power line;

a third power line configured to couple the first power line to the second power line; and

a control circuit configured to activate the first power-supply circuit from a first time point and to activate the second power-supply circuit from a second time point different from the first time point.

2. The semiconductor device according to claim 1 , further comprising:

a first decoupling capacitor coupled to the first power line; and

a second decoupling capacitor coupled to the second power line,

wherein the control circuit activates the second power-supply circuit in a predetermined operating cycle.

3. The semiconductor device according to claim 1 ,

wherein the control circuit further activates the first and the second power-supply circuits in a predetermined operating cycle, and

wherein the control circuit further activates the first and the second power-supply circuits in an exclusive manner.

4. A semiconductor device comprising:

first and second power-supply circuits each of which generates an internal power-supply voltage by converting a voltage value of a power-supply voltage into a different voltage value;

a first internal circuit that receives a supply of the internal power-supply voltage from the first power-supply circuit through a first line;

a second internal circuit that receives a supply of the internal power-supply voltage from the second power-supply circuit through a second line;

an inter-block line that connects the first and second lines to each other; and

a control circuit that operates the first and second internal circuits in a predetermined operating cycle, and controls a length of a period during which the first and second internal circuits operate simultaneously.

5. The semiconductor device according to claim 4 , further comprising a plurality of decoupling capacitances disposed between the first and second power-supply circuits and the first and second internal circuits and connected to the first and second lines respectively.

6. The semiconductor device according to claim 4 , wherein the control circuit operates the first and second internal circuits in an exclusive manner.

7. The semiconductor device according to claim 4 , wherein the control circuit starts to operate the first internal circuit in a period during which the second internal circuit is suspended.

8. The semiconductor device according to claim 4 , wherein the first power-supply circuit has a current supply capability corresponding to an amount of current consumption of the first internal circuit, and the second power-supply circuit has a current supply capability corresponding to an amount of current consumption of the second internal circuit.

9. The semiconductor device according to claim 4 , wherein the first and second power-supply circuits have an auxiliary power-supply circuit that generates the internal power-supply voltage in both of an operating period and a suspended period of the first and second internal circuits.

10. The semiconductor device according to claim 4 , wherein each of the first and second internal circuits has a same circuit configuration.

11. The semiconductor device according to claim 4 , wherein the first and second power-supply circuits generate the internal power-supply voltage by lowering the power-supply voltage.

12. The semiconductor device according to claim 4 , wherein each of the first and second internal circuits has a memory array comprising a plurality of memory elements arranged in a lattice pattern, and an input-and-output circuit that performs a data writing process to the memory array and a data reading process from the memory array and operates based on the internal power-supply voltage.

13. A control method of an internal circuit of a semiconductor device,

the semiconductor device comprising:

first and second power-supply circuits each of which generates an internal power-supply voltage by converting a voltage value of a power-supply voltage into a different voltage value;

a first internal circuit that receives a supply of the internal power-supply voltage from the first power-supply circuit through a first line;

a second internal circuit that receives a supply of the internal power-supply voltage from the second power-supply circuit through a second line; and

an inter-block line that connects the first and second lines to each other,

the control method comprising:

operating the first and second internal circuits in a predetermined operating cycle; and

starting to operate the first internal circuit in a period during which an operation of the second internal circuit is suspended.

14. The control method of an internal circuit according to claim 13 , wherein the first and second internal circuits are operated in an exclusive manner.

15. The control method of an internal circuit according to claim 14 , wherein

the second internal circuit starts to operate in a period during which the first internal circuit is operating, and repeats an operating state and a suspended state at a regular interval, and

the first internal circuit continuously performs an operating cycle of an operating state.