IP Library Granted Patent US 8,519,778
Granted Patent B2
US 8,519,778 · App. 13/160,007 · Granted Aug 27, 2013

Semiconductor integrated circuit and booster circuit including the same

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Quick Facts
Patent No.
US 8,519,778
App. No.
13/160,007
Granted
Aug 27, 2013
Kind
B2
Abstract

A semiconductor integrated circuit includes: a first transistor and a second transistor connected in series between a first voltage and a second voltage; a first inverter configured to control the first transistor; a second inverter configured to control the second transistor; and a current source, wherein the current source is connected in series with at least one of the first inverter or the second inverter.

Claims (66)

1. A semiconductor integrated circuit comprising:

a first transistor and a second transistor which are connected in series between a first voltage and a second voltage which is lower than the first voltage;

a first inverter configured to control the first transistor;

a second inverter configured to control the second transistor; and

a current source, wherein

the current source is connected in series with at least one of the first inverter or the second inverter, and

a current amount of the current source is independent of the first voltage.

2. The semiconductor integrated circuit of claim 1 , wherein the current source is a constant current source to which a constant voltage is applied.

3. The semiconductor integrated circuit of claim 1 , wherein a current value of the current source is controlled based on a clock signal.

4. The semiconductor integrated circuit of claim 1 , wherein the second inverter is supplied with a third voltage.

5. The semiconductor integrated circuit of claim 1 , wherein the current source is configured to switch between a plurality of current values.

6. The semiconductor integrated circuit of claim 1 , further comprising:

a control circuit including a register, wherein

a current value of the current source is set based on a value specified in the register.

7. The semiconductor integrated circuit of claim 1 , wherein a current value of the current source is set based on an output signal of a voltage detection circuit configured to detect a voltage level of an external power supply voltage.

8. A booster circuit comprising:

the semiconductor integrated circuit of claim 1 ; and

a boosting capacitor having a terminal connected to the semiconductor integrated circuit.

9. A semiconductor integrated circuit comprising:

a first transistor provided between a first voltage and an output terminal;

a second transistor provided between the output terminal and a second voltage which is lower than the first voltage;

a first inverter connected to a gate of the first transistor;

a second inverter connected to a gate of the second transistor; and

at least one of a first current source provided between the first inverter and the second voltage and having a current amount independent of the second voltage or a second current source provided between the first voltage and the second inverter and having a current amount independent of the first voltage.

10. The semiconductor integrated circuit of claim 9 , wherein at least one of the first current source or the second current source is controlled by a constant voltage applied thereto.

11. The semiconductor integrated circuit of claim 9 , wherein

both the first current source and the second current source are provided,

the first current source is controlled by a first clock signal input to the second inverter, and

the second current source is controlled by a second clock signal input to the first inverter.

12. The semiconductor integrated circuit of claim 9 , further comprising:

a control circuit including a register, wherein

a current value of the current source is set based on a value specified in the register.

13. The semiconductor integrated circuit of claim 9 , wherein a current value of the current source is set based on an output signal of a voltage detection circuit configured to detect a voltage level of an external power supply voltage.

14. The semiconductor integrated circuit of claim 11 , further comprising:

a control circuit including a register, wherein

the control circuit sets current values of the first current source and the second current source and frequencies of the first clock signal and the second clock signal based on a value specified in the register.

15. The semiconductor integrated circuit of claim 11 , further comprising:

a control circuit configured to set frequencies of the first clock signal and the second clock signal based on an output signal of a voltage detection circuit configured to detect a voltage level of an external power supply voltage, wherein

current values of the first current source and the second current source are set based on the output signal of the voltage detection circuit.

16. A booster circuit comprising:

the semiconductor integrated circuit of claim 9 ; and

a boosting capacitor having a terminal connected to the semiconductor integrated circuit.

17. A semiconductor integrated circuit comprising:

a first transistor provided between a first voltage and an output terminal;

a second transistor provided between the output terminal and a second voltage which is lower than the first voltage;

a first inverter connected to a gate of the first transistor;

a second inverter connected to a gate of the second transistor; and

at least one of a first current source provided between the first inverter and the second voltage and having a current amount independent of the second voltage or a second current source provided between a third voltage and the second inverter and having a current amount independent of the third voltage.

18. The semiconductor integrated circuit of claim 17 , wherein at least one of the first current source or the second current source is controlled by a constant voltage applied thereto.

19. The semiconductor integrated circuit of claim 17 , wherein

both the first current source and the second current source are provided,

the first current source is controlled by a first clock signal input to the second inverter, and

the second current source is controlled by a second clock signal input to the first inverter.

20. The semiconductor integrated circuit of claim 17 , further comprising:

a control circuit including a register, wherein

a current value of the current source is set based on a value specified in the register.

21. The semiconductor integrated circuit of claim 17 , wherein a current value of the current source is set based on an output signal of a voltage detection circuit configured to detect a voltage level of an external power supply voltage.

22. The semiconductor integrated circuit of claim 19 , further comprising:

a control circuit including a register, wherein

the control circuit sets current values of the first current source and the second current source and frequencies of the first clock signal and the second clock signal based on a value specified in the register.

23. The semiconductor integrated circuit of claim 19 , further comprising:

a control circuit configured to set frequencies of the first clock signal and the second clock signal based on an output signal of a voltage detection circuit configured to detect a voltage level of an external power supply voltage, wherein

current values of the first current source and the second current source are set based on the output signal of the voltage detection circuit.

24. A booster circuit comprising:

the semiconductor integrated circuit of claim 17 ; and

a boosting capacitor having a terminal connected to the semiconductor integrated circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 22, 2024
From: NUVOTON TECHNOLOGY CORPORATION JAPAN
To: ADVANCED MEMORY TECHNOLOGIES LLC
Reel/Frame 067184/0869 →
CHANGE OF NAME Recorded Mar 20, 2024
From: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
To: NUVOTON TECHNOLOGY CORPORATION JAPAN
Reel/Frame 066849/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 053570/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2011
From: YAMAHIRA, SEIJI
To: PANASONIC CORPORATION
Reel/Frame 026945/0179 →