IP Library Granted Patent US 8,610,514
Granted Patent B2
US 8,610,514 · App. 13/164,029 · Granted Dec 17, 2013

Full spectrum modulator for digital television signals

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Quick Facts
Patent No.
US 8,610,514
App. No.
13/164,029
Granted
Dec 17, 2013
Kind
B2
Abstract

A full spectrum modulator processes a plurality of CATV channels from separate paths. Each path has (i) a first filter for pulse shaping an input channel signal and upsampling a channel frequency thereof, (ii) an interpolator for interpolating the output of the first filter to a common sample rate, and (iii) a decimator for centering the output of the interpolator on a predetermined channel bandwidth. An IDFT processor receives channel signal outputs from the decimators. A polyphase filter bank receives IDFT processed parallel channel signals from the IDFT processor. A commutator converts the processed parallel channel signals from the polyphase filter bank to a single stream of data. A second filter upsamples the single stream of data to a fixed output sampling rate and low pass filters alias signals therefrom. Both standard and harmonically related carrier CATV channel frequency plans are accommodated.

Claims (63)

1. A full spectrum modulator comprising:

a plurality of parallel channel processing paths, each path having (i) a first filter for pulse shaping an input channel signal and upsampling a channel frequency thereof, (ii) an interpolator for interpolating the output of said first filter to a common sample rate, and (iii) a decimator for centering the output of said interpolator on a predetermined channel bandwidth that is related to said sample rate;

said parallel channel processing paths comprising a direct digital synthesizer (DDS) coupled between said interpolator and said decimator to add a carrier offset to signals input to said decimator from said interpolator;

an Inverse Discrete Fourier Transform (IDFT) processor coupled to receive channel signal outputs from the decimators of said plurality of parallel channel processing paths;

a complex to real signal processor coupled to receive IDFT processed parallel channel signals from said IDFT processor and convert complex signals to real signals to obtain converted parallel channel signals;

a polyphase filter bank coupled to receive the converted parallel channel signals from said signal processor;

a commutator for converting the converted parallel channel signals from said polyphase filter bank to a single stream of data; and

a second filter for upsampling the single stream of data to a fixed output sampling rate and for low pass filtering alias signals therein.

2. A modulator in accordance with claim 1 , wherein said modulator is for use with a standard cable television channel frequency plan.

3. A modulator in accordance with claim 1 , wherein said IDFT processor is a 360 point IDFT processor.

4. A modulator in accordance with claim 3 , wherein said first filter is a square root raised cosine (SRRC) filter with 1:2 upsampling.

5. A modulator in accordance with claim 4 , wherein said interpolator is a Farrow six tap cubic interpolator.

6. A modulator in accordance with claim 5 , wherein said decimator is a 2:1 decimator.

7. A modulator in accordance with claim 6 , wherein said second filter is an upsampling half band filter (HBF) with 1:2 upsampling.

8. A modulator in accordance with claim 1 , further comprising:

a frequency shifter between the polyphase filter bank and the commutator providing a half channel frequency shift for centering of the channel signals.

9. A modulator for use with a harmonically related carrier cable television channel frequency plan, comprising:

a plurality of parallel channel processing paths, each path having (i) a first filter for pulse shaping an input channel signal and upsampling a channel frequency thereof, (ii) an interpolator for interpolating the output of said first filter to a common sample rate, and (iii) a decimator for centering the output of said interpolator on a predetermined channel bandwidth that is related to said sample rate;

an Inverse Discrete Fourier Transform (IDFT) processor coupled to receive channel signal outputs from the decimators of said plurality of parallel channel processing paths;

a polyphase filter bank coupled to receive IDFT processed parallel channel signals from said IDFT processor;

a commutator for converting the processed parallel channel signals from said polyphase filter bank to a single stream of data;

a second filter for upsampling the single stream of data to a fixed output sampling rate and for low pass filtering alias signals therein;

wherein said IDFT processor is preceded by a cross bar switch adapted to flip the frequency spectrum of the channel signal outputs from the decimators prior to input to the IDFT processor.

10. A modulator in accordance with claim 9 , wherein said second filter comprises a high pass filter, a down converter following said high pass filter, and a low pass filter following said down converter.

11. A modulator in accordance with claim 10 , wherein said second filter comprises a high pass half band filter (HPF), a direct digital synthesizer (DDS) down converter following said high pass filter, and a low pass half band filter following said down converter.

12. A modulator in accordance with claim 9 , wherein said IDFT processor is a 360 point IDFT processor.

13. A modulator in accordance with claim 9 , wherein said first filter is a square root raised cosine (SRRC) filter with 1:2 upsampling.

14. A modulator in accordance with claim 13 , wherein said interpolator is a Farrow six tap cubic interpolator.

15. A modulator in accordance with claim 14 , wherein said decimator is a 2:1 decimator.

16. A modulator in accordance with claim 15 , wherein said second filter comprises a high pass filter, a down converter following said high pass filter, and a low pass filter following said down converter.

17. A modulator in accordance with claim 16 , wherein said IDFT processor is a 360 point IDFT processor.

18. A modulator in accordance with claim 9 , further comprising:

a frequency shifter between the polyphase filter bank and the commutator providing a half channel frequency shift for centering of the channel signals.

19. A method for modulating a plurality of cable television channel signals each having a channel frequency, comprising:

pulse shaping each of said channel signals;

upsampling the channel frequency of each pulse shaped signal;

interpolating the pulse shaped, upsampled signals to a common sample rate;

adding a carrier offset to the interpolated signals provided by said interpolating step;

centering the interpolated signals to a predetermined channel bandwidth that is related to the common sample rate;

performing an Inverse Discrete Fourier Transform (IDFT) on each of said channel signals;

converting the signals from complex to real after said IDFT;

polyphase filtering the channel signals after said converting;

converting the filtered channel signals from said polyphase filter bank into a single stream of data;

upsampling the single stream of data to a fixed output sampling rate; and

low pass filtering the upsampled single stream of data to remove alias signals therefrom.

20. A method in accordance with claim 19 , wherein the method is for use with a standard cable television channel frequency plan.

21. A method in accordance with claim 19 , further comprising:

frequency shifting the channel signals by one half of a channel frequency after the polyphase filtering for centering of the channel signals.

22. A method for modulating a plurality of cable television channel signals each having a channel frequency for use with a harmonically related carrier cable television channel frequency plan, comprising:

pulse shaping each of said channel signals;

upsampling the channel frequency of each pulse shaped signal;

interpolating the pulse shaped, upsampled signals to a common sample rate;

centering the interpolated signals to a predetermined channel bandwidth that is related to the common sample rate;

performing an Inverse Discrete Fourier Transform (IDFT) on each of said channel signals;

polyphase filtering the channel signals after said IDFT;

converting the filtered channel signals from said polyphase filter bank into a single stream of data;

upsampling the single stream of data to a fixed output sampling rate;

low pass filtering the upsampled single stream of data to remove alias signals therefrom;

flipping the channel signals between said centering and IDFT steps;

high pass filtering the single stream of data during the second upsampling step; and

down converting the high pass filtered single stream of data prior to said low pass filtering step.

23. A method in accordance with claim 22 , further comprising:

frequency shifting the channel signals by one half of a channel frequency after the polyphase filtering for centering of the channel signals.

Assignments (15)
RELEASE OF SECURITY INTEREST Recorded Oct 4, 2023
From: CITIZENS BANK,N.A.
To: GATESAIR, INC.
Reel/Frame 065117/0891 →
SECURITY INTEREST Recorded Aug 1, 2022
From: PHENIXYA LENDCO II, LLC; GATESAIR, INC.; PHENIXYA LENDCO I, LLC
To: CITIZENS BANK, N.A.
Reel/Frame 061039/0484 →
SECURITY INTEREST Recorded Mar 3, 2020
From: GATESAIR, INC.
To: FIRST FINANCIAL BANK
Reel/Frame 052073/0557 →
RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL AT REEL/FRAME NO. 35327/0262 Recorded Feb 28, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS AGENT
To: GATESAIR, INC.
Reel/Frame 052050/0007 →
RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL AT REEL/FRAME NO. 35353/0208 Recorded Feb 28, 2020
From: BROADCAST LENDCO, LLC (SUCCESSOR TO PNC BANK, NATIONAL ASSOCIATION), AS AGENT
To: GATESAIR, INC.
Reel/Frame 052050/0193 →
ASSIGNMENT OF INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Feb 28, 2020
From: PNC BANK, NATIONAL ASSOCIATION, AS EXISTING AGENT
To: BROADCAST LENDCO, LLC, AS SUCCESSOR AGENT
Reel/Frame 052050/0074 →
RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL AT REEL/FRAME NO. 35275/0228 Recorded Feb 28, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION, AS AGENT
To: GATESAIR, INC.
Reel/Frame 052049/0988 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2018
From: IMAGINE COMMUNICATIONS CORP.
To: GATESAIR, INC.
Reel/Frame 046728/0299 →
SECURITY AGREEMENT Recorded Apr 1, 2015
From: IMAGINE COMMUNICATIONS CORP. (F/K/A HBC SOLUTIONS, INC.)
To: PNC BANK, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 035353/0208 →
SECURITY INTEREST Recorded Mar 27, 2015
From: IMAGINE COMMUNICATIONS CORPORATION (FORMERLY KNOWN AS HBC SOLUTIONS, INC.)
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 035275/0228 →
PATENT COLLATERAL SECURITY AGREEMENT Recorded Mar 27, 2015
From: IMAGINE COMMUNICATIONS CORPORATION (FORMERLY KNOWN AS HBC SOLUTIONS, INC.)
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 035327/0262 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2015
From: RGB NETWORKS, INC.
To: IMAGINE COMMUNICATIONS CORP.
Reel/Frame 034973/0821 →
RELEASE OF SECURITY INTEREST Recorded Feb 11, 2015
From: SILICON VALLEY BANK
To: RGB NETWORKS, INC
Reel/Frame 034955/0630 →
SECURITY INTEREST Recorded Aug 3, 2014
From: RGB NETWORKS, INC.
To: SILICON VALLEY BANK
Reel/Frame 033463/0440 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2011
From: LAUDEL, KENNAN
To: RGB NETWORKS, INC.
Reel/Frame 026480/0443 →