Method of manufacturing a display substrate

1. A method of manufacturing a display substrate, the method comprising:

forming a common electrode line, a gate line, a data line and a switching element connected to the gate and data lines on an insulation substrate;

sequentially forming a first pixel electrode and an insulation layer on the insulation substrate on which the switching element is formed;

forming a first photoresist pattern from a first photoresist layer on the insulation substrate on which the insulation layer is formed, the first photoresist pattern including a first hole and a second hole formed through the first photoresist pattern, the first contact hole exposing the common electrode line, the second hole exposing the first pixel electrode;

coating a first transparent electrode layer on the insulation substrate on which the first photoresist pattern is formed;

coating a second photoresist layer on the insulation substrate on which the first transparent electrode layer is formed;

exposing and developing the second photoresist layer to form a second photoresist pattern remaining in the first hole and the second hole; and

patterning the first transparent electrode layer using the second photoresist pattern, to form a second pixel electrode making contact with the common electrode line and including a plurality of openings formed through the second pixel electrode.

2. The method of claim 1 , wherein a portion of the first transparent electrode layer corresponding to the first hole and the second hole of the first photoresist pattern forms the second pixel electrode.

3. The method of claim 2 , wherein the first photoresist pattern is formed using a first mask, and the first mask includes a blocking portion disposed over the switching element, a transmissive portion disposed over the common electrode line, and a slit pattern disposed over the first pixel electrode.

4. The method of claim 3 , wherein forming the first photoresist pattern further comprises:

patterning the first photoresist layer to form a first sub photoresist pattern including a first sub hole and a plurality of recess portions, the first sub hole being formed using the transmissive portion and exposing the insulation layer corresponding to the common electrode line, the recess portions being formed by the slit pattern and disposed on the first pixel electrode;

forming the first hole through the insulation layer using the first sub photoresist pattern as an etch stopping layer; and

entirely etching back the first sub photoresist pattern to form the first photoresist pattern.

5. The method of claim 4 , wherein a depth of each of the recess portions is smaller than that of the first hole.

6. The method of claim 5 , wherein forming the first photoresist pattern comprises forming the second holes exposing the insulation layer on the first pixel electrode by etching back the recess portions.

7. The method of claim 5 , wherein a thickness of the second photoresist layer is larger than the depth of the recess portions.

8. The method of claim 5 , wherein forming the second photoresist pattern comprises entirely exposing the second photoresist layer.

9. The method of claim 5 , wherein forming the second pixel electrode comprises patterning the first transparent electrode layer by a wet etching.

10. The method of claim 5 , further comprising removing the first and second photoresist patterns using a stripper.

11. The method of claim 5 , wherein forming the switching element comprises:

forming a gate metal layer on the insulation substrate; and

patterning the gate metal layer to form the gate line, the common electrode line and a control terminal of the switching element.

12. The method of claim 11 , further comprising forming a semiconductor pattern on the control terminal of the switching element.

13. The method of claim 12 , further comprising:

sequentially forming first and second semiconductor layers and a data metal layer on the insulation substrate on which the gate line, the common electrode line and the control terminal of the switching element are formed; and

patterning the first and second semiconductor layers and the data metal layer, to form an input terminal of the switching element, an output terminal of the switching element and the data line connected to the input terminal of the switching element.

14. The method of claim 13 , wherein forming the input terminal of the switching element, the output terminal of the switching element and the data line comprises:

coating a third photoresist layer on the data metal layer;

patterning the third photoresist layer to form a third sub photoresist pattern including a first portion having a first height and a second portion having a second height; and

etching the first and second semiconductor layers and the data metal layer using the third sub photoresist pattern as an etch stopping layer.

15. The method of claim 14 , wherein forming the input terminal of the switching element, the output terminal of the switching element and the data line comprises:

etching the third sub photoresist pattern to form a third photoresist pattern exposing the data metal layer; and

etching the first and second semiconductor layers and the data metal layer using the third photoresist pattern as an etching stopping layer to expose the first semiconductor layer.

16. The method of claim 15 , wherein the third photoresist pattern is patterned using a second mask, and the second mask includes a blocking portion disposed over the input and output terminals of the switching element and a transflective portion disposed over the semiconductor pattern between the input and output terminals of the switching element.

17. The method of claim 11 , further comprising forming a gate insulation layer covering the gate line, the common electrode line and the control terminal of the switching element.

18. The method of claim 17 , wherein forming the first hole comprises partially removing the gate insulation layer disposed over the common electrode line.

19. The method of claim 11 , wherein sequentially forming the first pixel electrode and the insulation layer comprises:

forming a second transparent electrode layer on the insulation substrate on which the switching element is formed;

patterning the second transparent electrode layer to form the first pixel electrode directly making contact with an output terminal of the switching element; and

forming the insulation layer on the insulation substrate on which the first pixel electrode is formed.

20. The method of claim 1 , wherein each of the first and second photoresist layers includes a photo sensitive material.