Semiconductor device having reduced on-resistance characteristics

1. A semiconductor device, comprising:

a drain region formed from a semiconductor region of first conductivity type;

a body region formed from a semiconductor region of second conductivity type made on the drain region;

a source region formed from the semiconductor region of first conductivity type formed within the body region;

a body contact region that is formed in an area which lies in the body region but differs from the source region and that is formed from a highly-doped semiconductor region of second conductivity type;

trenches formed so as to extend from the source region to the drain region while passing through the body region;

a gate electrode formed within each of the trenches;

a source electrode formed so as to contact the source region and the body contact region; and

a drain electrode formed in the drain region, wherein

each of the trenches has a substantially linear tapered surface spreading outside from an edge of an opening; and

wherein an area between the source region and the source electrode filled in each of the trenches makes up a source-contact region, and

said source electrode contacts said body contact region along the tapered surface of each trench.

2. The semiconductor device according to claim 1 , wherein each of the trenches has a vertical surface whose cross section extends in a vertical direction and a tapered surface that is formed along an upper edge of the vertical surface so as to extend outside from an edge of an opening; and wherein

each of the tapered surfaces is formed so as to extend from a marginal edge of an insulation film covering the gate electrode up to an upper edge of the source region.

3. The semiconductor device according to claim 1 , wherein the semiconductor device is a SiMOSFET formed on a silicon substrate.