IP Library Granted Patent US 9,324,499
Granted Patent B2
US 9,324,499 · App. 13/168,879 · Granted Apr 26, 2016

High capacitance single layer capacitor

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Quick Facts
Patent No.
US 9,324,499
App. No.
13/168,879
Granted
Apr 26, 2016
Kind
B2
Abstract

A high capacitance single layer ceramic capacitor structure having a ceramic dielectric body containing one or more internal electrodes electrically connected to a metallization layer applied to the side and bottom surfaces and a metallization pad electrically isolated from the metallization side and bottom surfaces positioned on a top surface of the ceramic body.

Claims (7)

1. A high capacitance single layer ceramic capacitor comprising a single layer ceramic dielectric body having at least one internal buried electrode extending across an entire width thereof in electrical contact with a conductive metallization layer positioned on at least a portion of each of the four sides and an entire bottom surface of the single layer ceramic dielectric body, and at least one electrically isolated metallization pad positioned on a top surface of the single layer ceramic dielectric body and electrically isolated from all electrodes inside the single layer ceramic dielectric body,

wherein the electrically isolated metallization pad is in parallel with a main surface of the internal buried electrode, and formed only on a top surface of the ceramic dielectric body.

2. The capacitor of claim 1 , further having two or more electrodes spaced within the single layer ceramic dielectric body.

3. The capacitor of claim 1 , wherein there are a plurality of metallization pads electrically isolated from one another on the top surface of the capacitor.

4. The capacitor of claim 3 , wherein the metallization pads are different sizes.

5. A high capacitance single layer ceramic capacitor comprising a single layer ceramic dielectric body having at least one internal buried electrode extending across an entire width thereof in electrical contact with a conductive metallization layer positioned on at least a portion of each of the four sides, said capacitor further comprising a metallization layer on an entire bottom surface of the single layer ceramic dielectric body, and at least one electrically isolated metallization pad positioned on a top surface of the single layer ceramic dielectric body and electrically isolated from all electrodes inside the single layer ceramic dielectric body,

wherein the electrically isolated metallization pad is in parallel with a main surface of the internal buried electrode, and formed only on a top surface of the ceramic dielectric body.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 22, 2016
From: KNOWLES CAPITAL FORMATION INC.
To: KNOWLES CAZENOVIA, INC.
Reel/Frame 040744/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2014
From: DELAWARE CAPITAL FORMATION, INC.
To: KNOWLES CAPITAL FORMATION, INC.
Reel/Frame 032109/0595 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2011
From: MOALEMI, ALI; ARMSTRONG, EUAN PATRICK
To: DELAWARE CAPITAL FORMATION, INC.
Reel/Frame 026557/0910 →