LED display systems
An LED display system comprises an LED array and an LED driver circuit. An LED driver circuit comprises components including a phase lock loop, a pulse width modulation engine, a configuration register, a gain adjustable fast charge current source, and a serial input/output interface. The components in this driver circuit may be integrated on a same chip. The LED array may be arranged in a common cathode configuration.
1. A driver circuit for LEDs, comprising:
a phase lock loop;
a pulse width modulation engine;
a configuration register;
a gain adjustable fast charge current source; and
a serial input/output interface,
wherein the phase lock loop, operatively connected to the serial input/output interface, provides a global clock signal,
wherein the pulse width modulation engine, operatively connected to the serial input/output interface, receives gray scale values from the serial input/output interface and a global clock signal from the phase lock loop, and generates a PWM signal embedded with the gray scale values for the gain adjustable fast charge current source,
wherein the configuration register, operatively connected to serial input/output interface and gain adjustable fast charge current source, stores driver circuit settings,
wherein the gain adjustable fast charge current source, operatively connected to the configuration register, the serial input/output interface, and the PWM engine, provides a current output to drive an LED array, wherein the LED array is arranged in a common cathode configuration, wherein anodes of a plurality of LEDs are connected to a common anode node, wherein the common anode node is operatively connected to the gain adjustable fast charge current source,
wherein the serial input/output interface, operatively connected to the phase locked loop, the configuration register, the PWM engine, and the gain adjustable fast charge current source, provides a driver circuit setting to the configuration register, provides a gray scale value to the pulse width modulation engine, and provides a global gain adjustment setting to the gain adjustable fast charge current source,
wherein the gain adjustable fast charge current source comprises a power source, a fast charge circuit powered by the power source, a global gain adjustment circuit for adjusting a gain of the fast charge circuit, and an on-off switch operatively connecting the fast charge circuit to the LED array,
wherein the global gain adjustment circuit is operatively connected to an external resistor, and
wherein the on-off switch is controlled by the PWM signal.
2. A driver circuit for LEDs, comprising:
a phase lock loop;
a pulse width modulation engine;
a configuration register;
a gain adjustable fast charge current source; and
a serial input/output interface,
wherein the phase lock loop, operatively connected to the serial input/output interface, provides a global clock signal,
wherein the pulse width modulation engine, operatively connected to the serial input/output interface, receives gray scale values from the serial input/output interface and a global clock signal from the phase lock loop, and generates a PWM signal embedded with the gray scale values for the gain adjustable fast charge current source,
wherein the configuration register, operatively connected to serial input/output interface and gain adjustable fast charge current source, stores driver circuit settings,
wherein the gain adjustable fast charge current source, operatively connected to the configuration register, the serial input/output interface, and the PWM engine, provides a current output to drive an LED array, wherein the LED array is arranged in a common cathode configuration, wherein anodes of a plurality of LEDs are connected to a common anode node, wherein the common anode node is operatively connected to the gain adjustable fast charge current source,
wherein the serial input/output interface, operatively connected to the phase locked loop, the configuration register, the PWM engine, and the gain adjustable fast charge current source, provides a driver circuit setting to the configuration register, provides a gray scale value to the pulse width modulation engine, and provides a global gain adjustment setting to the gain adjustable fast charge current source, and
wherein the pulse width modulation engine comprises a skew control for displacing a rising edge of the current output, a counter, a SRAM that stores a gray scale data and a DOT correction data, a gray scale loading circuit, and an comparator for generating the PWM signal.