Granted Patent B1

US 8,518,748 · App. 13/172,583 · Granted Aug 27, 2013

Abstract

Claims (67)

1. A method for providing a plurality of laser diode submounts for use in an energy assisted magnetic recording (EAMR) disk drive comprising:

removing a portion of a silicon substrate to form a plurality of trenches therein, the plurality of trenches having sidewalls and surrounding a silicon island corresponding to a laser diode submount of the plurality of laser diode submounts, the plurality of trenches corresponding to a thickness of the laser diode submount, the silicon island having a top surface and a plurality of facets corresponding to the sidewalls of the plurality of trenches;

providing at least one insulator for the top surface and the plurality of facets of the silicon island for the plurality of trenches;

providing metallization on the top surface and the plurality of facets of the silicon island for the plurality of trenches, a first portion of the metallization on the top surface corresponding to under bump metal (UBM) for at least one solder pad, a second portion of the metallization corresponding to electrical traces;

providing at least one solder pad on the UBM on the top surface of the silicon island for the plurality of trenches;

releasing the silicon island for the plurality of trenches from the silicon substrate.

2. The method of claim 1 wherein the step of removing the portion of the silicon substrate further includes:

providing a hard mask on the top surface of the silicon substrate, the hard mask including a plurality of apertures therein, the plurality of apertures exposing the portion of the silicon substrate corresponding to the plurality of trenches; and

performing a deep reactive ion etch to remove the portion of the silicon substrate.

3. The method of claim 1 wherein the plurality of trenches has a depth of at least fifty microns.

4. The method of claim 1 wherein the step of providing the at least one insulator for the top surface and plurality of facets further includes:

growing at least one of a silicon nitride layer and a silicon dioxide layer on an exposed portion of the top surface and the plurality of facets.

5. The method of claim 1 wherein the step of providing the insulator corresponding to the top surface and plurality of facets further includes:

depositing at least one of a silicon nitride layer and a silicon dioxide layer on an exposed portion of the top surface and the plurality of facets.

6. The method of claim 1 wherein the step of providing the metallization further includes:

providing a metallization mask having a metallization mask pattern, the metallization mask pattern including at least one aperture corresponding to the UBM and the electrical traces; and

blanket depositing the metallization.

7. The method of claim 1 wherein the step of providing the at least one solder pad further includes:

providing a solder pad mask having a solder pad mask pattern, the solder pad mask pattern including at least one aperture corresponding to the at least one solder pad; and

depositing solder.

8. The method of claim 1 wherein the silicon substrate has a top substrate surface including the island for the plurality of trenches and a back surface opposite to the top substrate surface, wherein each of the plurality of trenches has a trench bottom, and wherein the step of releasing the silicon island further includes:

temporarily bonding the top substrate surface of the silicon substrate to a carrier substrate;

removing a portion of silicon substrate from the back surface to expose an interior surface of the silicon substrate, the interior surface being a distance from the trench bottom;

etching a remaining portion of the silicon substrate to the trench bottom;

removing a portion of insulation, exposing a portion of the metallization on the trench bottom;

removing the portion of the metallization; and

releasing the silicon island corresponding to the plurality of trenches from the carrier substrate.

9. The method of claim 2 wherein the step of providing the hard mask further includes:

depositing a hard mask layer;

providing a photoresist mask having a pattern corresponding to the plurality of trenches; and

transferring the pattern to the hard mask layer, thereby providing the hard mask.

10. The method of claim 9 wherein the hard mask layer includes at least one of silicon dioxide, silicon nitride, Ti, Ta, and Ni.

11. The method of claim 9 wherein each of the plurality of trenches has a top angle with the top surface of the silicon island, the top angle being at least 89.5 degrees and not more than 90.5 degrees.

12. The method of claim 9 wherein the step of removing the portion of the silicon substrate further includes:

removing the hard mask.

13. The method of claim 3 wherein the depth is at least one hundred fifty microns.

14. The method of claim 3 wherein the depth is at least two hundred microns.

15. The method of claim 6 wherein the step of providing the metallization further includes:

removing the metallization mask.

16. The method of claim 6 wherein the step of blanket depositing the metallization includes:

depositing an adhesion layer including at least one of Ti, Cr, and Ta;

depositing a barrier layer, including at least one of Pt, Ni, Pd, and W; and

depositing a metal layer including at least one of Au and Cu.

17. The method of claim 7 wherein the step of providing the at least one solder pad further includes:

removing the solder pad mask.

18. The method of claim 8 wherein the depth is not more than twenty microns.

19. The method of claim 8 wherein the depth is not more than ten microns.

20. The method of claim 8 wherein the step of temporarily bonding further includes using at least one of thermal tape and wax.

21. A method for providing a plurality of laser diode submounts for use in an energy assisted magnetic recording (EAMR) disk drive comprising:

depositing a hard mask layer a silicon substrate, the hard mask layer consisting of silicon dioxide, the silicon substrate having a top surface and a back surface opposite to the top surface, the hard mask layer residing on the top surface;

providing a photoresist mask having a pattern on the hard mask layer;

transferring the pattern to the hard mask layer, thereby providing a hard mask having a plurality of apertures corresponding to the pattern, the plurality of apertures exposing a portion of the silicon substrate,

performing a deep reactive ion etch to remove the portion of a silicon substrate thereby forming a plurality of trenches in the silicon substrate, each of the plurality of trenches surrounding a silicon island corresponding to a laser diode submount of the plurality of laser diode submounts, each of the plurality of trenches having a trench bottom, at least one sidewall and a depth corresponding to a thickness of the laser diode submount, the depth being at least one hundred microns, the silicon island having a top face and a plurality of facets corresponding to the at least one sidewall of each of the plurality of trenches, the top face and the plurality of facets forming at least one top angle of at least 89.5 degrees and not more than 90.5 degrees;

removing the hard mask;

providing an insulating layer including silicon dioxide on the top face and the plurality of facets of the silicon island in each of the plurality of trenches;

providing a metallization mask having a metallization mask pattern, the metallization mask pattern including at least one aperture for at least one under bump metal (UBM) on the top surface of the silicon island and for electrical traces for the silicon island, a portion of the metallization mask residing in the plurality of trenches;

depositing at least one metallization layer, the at least one metallization layer on the top surface and the plurality of facets of the silicon island for each of the plurality of trenches, a first portion of the metallization layer on the top surface corresponding to the at least one UBM for at least one solder pad, a second portion of the metallization corresponding to the electrical traces;

removing the metallization mask, a remaining portion of the at least one metallization layer forming the at least one UBM and the electrical traces;

providing a solder pad mask having a solder pad mask pattern, the solder pad mask pattern including at least one aperture corresponding to the at least one solder pad;

depositing solder for the at least one solder pad;

removing the solder pad mask;

temporarily bonding the top surface of the silicon substrate to a carrier substrate using at least one of wax and thermal tape;

removing a portion of silicon substrate from the back surface through grinding, the removing exposing an interior surface of the silicon substrate, the interior surface being a distance from the trench bottom of not more than ten microns;

etching a remaining portion of the silicon substrate to the trench bottom using a silicon reactive ion etch;

removing a portion of insulating layer through a silicon dioxide RIE, exposing a portion of the at least one metallization layer on the trench bottom;

removing the portion of the at least one metallization layer using an ion mill; and

releasing the silicon island corresponding to each of the plurality of trenches from the carrier substrate.

Assignments (9)