IP Library Granted Patent US 8,525,580
Granted Patent B2
US 8,525,580 · App. 13/173,024 · Granted Sep 3, 2013

Semiconductor circuit and constant voltage regulator employing same

Inventors: Koichi Morino (Kanagawa, JP); Yuki Kashima (Kanagawa, JP); Masatoshi Ito (Kanagawa, JP); Shimpei Sakai (Kanagawa, JP)
Assignee: Ricoh Company, Ltd.
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Quick Facts
Patent No.
US 8,525,580
App. No.
13/173,024
Granted
Sep 3, 2013
Kind
B2
Abstract

A semiconductor circuit includes a voltage regulator and a buffer transistor. The voltage regulator converts an input voltage input to an input terminal thereof into an output voltage output to an output terminal thereof. The buffer transistor is an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator.

Claims (27)

1. A semiconductor circuit for use in connection with a power supply terminal, the circuit comprising:

a voltage regulator to convert an input voltage input to an input terminal thereof into an output voltage output to an output terminal thereof; and

a buffer transistor, being an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator, a voltage at the gate terminal being higher than a voltage at the source terminal.

2. The semiconductor circuit according to claim 1 , further comprising a resistor disposed between the power supply terminal and the drain terminal of the buffer transistor.

3. The semiconductor circuit according to claim 1 , further comprising:

a resistor disposed between the power supply terminal and the gate terminal of the buffer transistor; and

a capacitor disposed between a ground and the gate terminal of the buffer transistor.

4. The semiconductor circuit according to claim 1 , wherein the voltage regulator is implemented in an integrated circuit containing one or more circuit components integrated into a single integrated unit, at least one of the circuit components supplied with the output voltage regulated through the voltage regulator.

5. The semiconductor circuit according to claim 1 , wherein the voltage regulator includes a driver transistor connected between the input and output terminals thereof, the source terminal of the buffer transistor being connected solely to a conductive terminal of the driver transistor.

6. The semiconductor circuit according to claim 5 , further comprising a resistor disposed between the power supply terminal and the drain terminal of the buffer transistor.

7. The semiconductor circuit according to claim 5 , further comprising:

a resistor disposed between the power supply terminal and the gate terminal of the buffer transistor; and

a capacitor disposed between a ground and the gate terminal of the buffer transistor.

8. The semiconductor circuit according to claim 5 , wherein the voltage regulator is implemented in an integrated circuit containing one or more circuit components integrated into a single integrated unit, at least one of the circuit components being supplied with the output voltage regulated through the voltage regulator.

9. The semiconductor circuit according to claim 8 , wherein the driver transistor of the voltage regulator is an n-channel field effect transistor.

10. A voltage regulator for use in connection with a power supply terminal, the voltage regulator comprising:

an input terminal to receive an input voltage supplied from the power supply terminal;

an output terminal to output an output voltage to load circuitry;

a driver transistor connected between the input and output terminals to convert the input voltage into the output voltage; and

a buffer transistor, being an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator, a voltage at the gate terminal being higher than a voltage at the source terminal.

11. The voltage regulator according to claim 10 , wherein the source terminal of the buffer transistor is connected solely to a conductive terminal of the driver transistor.

12. The semiconductor circuit according to claim 1 , wherein the voltage at the gate terminal of the buffer transistor is equal to a voltage at the drain terminal of the buffer transistor.

13. The semiconductor circuit according to claim 1 , wherein the voltage regulator includes a differential amplifier having a positive power supply input terminal connected to the drain terminal of the buffer transistor.

14. The semiconductor circuit according to claim 1 , wherein the voltage regulator includes a reference voltage generator having an input terminal thereof connected to the drain terminal of the buffer transistor.

15. The semiconductor circuit according to claim 1 , wherein the voltage regulator comprises:

a reference voltage generator outputting a reference voltage and having an input terminal thereof connected to the drain terminal of the buffer transistor; and

a differential amplifier having a positive power supply input terminal connected to the drain terminal of the buffer transistor, wherein the reference voltage output by the reference voltage generator s supplied to an inverting terminal of the differential amplifier.

Assignments (4)
CHANGE OF NAME Recorded Mar 3, 2022
From: NEW JAPAN RADIO CO., LTD.
To: NISSHINBO MICRO DEVICES INC.
Reel/Frame 059311/0446 →
MERGER Recorded Feb 14, 2022
From: RICOH ELECTRONIC DEVICES CO., LTD.
To: NEW JAPAN RADIO CO., LTD.
Reel/Frame 059085/0740 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 18, 2015
From: RICOH COMPANY, LTD.
To: RICOH ELECTRONIC DEVICES CO., LTD.
Reel/Frame 035011/0219 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2011
From: MORINO, KOICHI; KASHIMA, YUKI; ITO, MASATOSHI; SAKAI, SHIMPEI
To: RICOH COMPANY, LTD.
Reel/Frame 026552/0933 →
Priority Claims (1)
JP 2010-160572 · Jul 15, 2010 · national
Continuity (1)
Related Publication 20120013396A1 · Jan 19, 2012