SYSTEMS AND METHODS FOR STORING, RETRIEVING, AND ADJUSTING READ THRESHOLDS IN FLASH MEMORY STORAGE SYSTEM
A method, system and computer-readable medium are provided for reading information from a memory unit. A read instruction may be received to read information from a set of memory cells in the memory unit. A data structure storing sets of read thresholds may be searched for a set of read thresholds based on one or more characteristic value(s) of the set of memory cells. If the set of read thresholds is found, the set of memory cells may be read to execute the read instruction using the found set of read thresholds. The set of read thresholds may be thresholds which were previously used to successfully read a set of cells having the same or similar characteristic value(s).
1 . A method for reading information from a memory unit, the method comprising:
receiving a read instruction to read information from a set of memory cells in the memory unit;
searching a data structure storing sets of read thresholds for a set of read thresholds based on one or more characteristic value(s) of the set of memory cells; and
if the set of read thresholds is found, reading the set of memory cells to execute the read instruction using the found set of read thresholds.
2 . The method of claim 1 , wherein the set of read thresholds were previously used to successfully read a set of cells having the same or similar characteristic value(s).
3 . The method of claim 1 comprising, if the set of read thresholds is not found or said reading using the set of read thresholds is unsuccessful, computing a new set of read thresholds to read the set of memory cells to execute the read instruction.
4 . The method of claim 1 , wherein if the set of read thresholds is found but said reading generates an above threshold number of errors, comprising replacing the found set of read thresholds in storage with a new set of read thresholds for executing subsequent read instructions.
5 . The method of claim 4 , wherein the new set of read thresholds is computed based on (a) a reference set of read thresholds and (b) a set of predetermined differences between the set of read thresholds not found and the reference set.
6 . The method according to claim 5 , wherein the reference set of read thresholds and the requested set of read thresholds are defined to read cells from different physical rows of the memory unit.
7 . The method of claim 4 , wherein the new set of read thresholds is computed by adjusting the voltage(s) of one or more thresholds in the set.
8 . The method of claim 1 , wherein the characteristic value(s) used to search for the set of read thresholds includes a partition index of the set of memory cells in the memory unit.
9 . The method of claim 8 , wherein the partition index is a row number of the set of memory cells.
10 . The method of claim 1 , wherein the characteristic value(s) used to search for the set of read thresholds includes a time stamp when the set of memory cells were last programmed.
11 . The method of claim 1 , wherein the characteristic value(s) used to search for the set of read thresholds includes a number of programming cycles executed on the set of memory cells.
12 . The method of claim 1 , wherein the characteristic value(s) used to search for the set of read thresholds includes a degradation level of the set of memory cells.
13 . The method of claim 12 , wherein a range of numbers of programming cycles executed on different sets of cells in the memory unit is limited to be within a predetermined maximum threshold range defined by a wear leveling policy.
14 . The method of claim 1 , wherein the set of read thresholds are searched for using the characteristic value(s) of the set of memory cells as keys to a data structure storing read thresholds for those characteristic value(s).
15 . The method of claim 1 , wherein the set of read thresholds includes 2 M-1 read thresholds for reading an Mth bit in the set of memory cells or 2 N −1 read thresholds for reading all bits in the set of memory cells in an N-bits per cell memory unit.
16 . A system, comprising:
a memory unit including multiple sets of memory cells;
a memory controller, coupled to the memory unit, to receive a read instruction for reading information from one of the sets of memory cells in the memory unit;
a data structure adapted to store sets of read thresholds each adapted to read sets of memory cells for a different one or more characteristic value(s), wherein the memory controller is adapted to search the data structure for a set of read thresholds based on one or more characteristic value(s) of the set of memory cells defined in the read instruction; and
a read circuit adapted to, if the set of read thresholds is found, read the set of memory cells defined in the read instruction using the found set of read thresholds.
17 . The system of claim 16 , wherein the set of read thresholds were previously used to successfully read a set of cells having the same or similar characteristic value(s).
18 . The system of claim 16 comprising offset circuitry, wherein, if the set of read thresholds is not found or said reading using the set of read thresholds is unsuccessful, the offset circuitry computes a new set of read thresholds to read the set of memory cells to execute the read instruction.
19 . The system of claim 16 , wherein if the set of read thresholds is found but said reading generates an above threshold number of errors, the memory controller replaces the found set of read thresholds in storage with a new set of read thresholds for executing subsequent read instructions.
20 . The system of claim 19 comprising offset circuitry, wherein the offset circuitry computes the new set of read thresholds based on (a) a reference set of read thresholds and (b) a set of predetermined differences between the set of read thresholds not found and the reference set.
21 . The system of claim 16 , wherein the memory controller searches for the set of read thresholds using characteristic value(s) that include a partition index of the set of memory cells in the memory unit.
22 . The system of claim 16 , wherein the memory controller searches for the set of read thresholds using characteristic value(s) that include a time stamp of when the set of memory cells were last programmed.
23 . The system of claim 16 , wherein the memory controller searches for the set of read thresholds using characteristic value(s) that include a number of programming cycles executed on the set of memory cells.
24 . The system of claim 16 , wherein the memory controller searches for the set of read thresholds using characteristic value(s) that include a degradation level of the set of memory cells.
25 . The system of claim 24 , wherein the memory controller implements a wear leveling policy to limit a range of numbers of programming cycles executed on different sets of cells in the memory unit to be within a predetermined maximum threshold range defined by a wear leveling policy.
26 . The system of claim 16 , wherein the memory controller searches for the set of read thresholds using the characteristic value(s) of the set of memory cells as keys to a data structure storing read thresholds for those characteristic value(s).
27 . The system of claim 16 , wherein the read circuit reads an Mth bit in the set of memory cells using a set of 2 M-1 read thresholds or all bits in the set of memory cells in an N-bits per cell memory unit using a set of or 2 N −1 read thresholds.
28 . A non-transient computer-readable medium, having instructions stored thereon, which when executed by a processor of a computer cause the computer to:
receive a read instruction to read information from a set of memory cells in the memory unit;
search a data structure storing sets of read thresholds for a set of read thresholds based on one or more characteristic value(s) of the set of memory cells; and
if the set of read thresholds is found, read the set of memory cells to execute the read instruction using the found set of read thresholds.