Invoking operating system functionality without the use of system calls
View Patent ↗Embodiments of the invention operate within the context of a system with a processor providing memory-monitoring functionality. The lower-privileged code of a first process, such as user application code, communicates directly with higher-privileged code of a second process, such as interrupt-handling code of the operating system kernel, without using a software interrupt or other gate mechanism. This enhances overall system performance by eliminating the saving of state and processing inherent in interrupt handling, and also avoids missing events that may occur while other interrupts are masked during event handling. Specifically, the second process initializes a monitored memory area that is directly accessible by processes having at least the privilege level of the first process. The second process further initializes memory-monitoring hardware of the processor to monitor writes to the monitored memory area, such that the second process will resume execution from a dormant state when a write takes place.
1. A computer-implemented method comprising:
a second process detecting memory write sizes that will cause memory monitoring hardware of a processor to wake a waiting processor core;
the second process initializing, based on the detected memory write sizes, a monitored memory area for use by processes having at least a privilege level of a first process, the second process having a higher privilege level than the privilege level of the first process;
the second process initializing memory monitoring hardware of a processor to monitor writes to the monitored memory area;
the first process writing, to the monitored memory area, an operation code specifying sending a packet over a network interface by the second process, and packet data representing the packet;
the memory monitoring hardware transferring control to the second process responsive to the first process writing to the monitored memory area;
the second process reading the operation code and packet data from the monitored memory area;
responsive to the operation code, the second process writing the packet data to a segment of memory belonging to a network protocol stack;
the first process polling an output memory area for output of the sending of the packet;
the second process writing an output of the sending of the packet to the output memory area; and
the first process reading the output from the output memory area.
2. The computer-implemented method of claim 1 , wherein the second process initializing the memory monitoring hardware comprises the second process executing a MONITOR instruction of an SSE3 processor instruction set.
3. The computer-implemented method of claim 1 , wherein the first process is executed by a first core of a multi-core processor and the second process is executed by a second core of the multi-core processor, the method further comprising the second process executing a wait instruction that causes the second core to enter a dormant state until a write to the monitored memory takes place.
4. A computer system comprising:
a computer processor;
memory monitoring hardware; and
memory comprising a first process, a second process having a higher privilege level than the first process, and a monitored memory area;
wherein:
the second process detects memory write sizes that will cause memory monitoring hardware of a processor to wake a waiting processor core;
the second process initializes, based on the detected memory write sizes, the monitored memory area for use by processes having at least a privilege level of a first process;
the second process initializes the memory monitoring hardware to monitor writes to the monitored memory area;
the first process writes, to the monitored memory area, an operation code specifying sending a packet over a network interface by the second process, and packet data representing the packet;
the memory monitoring hardware transfers control to the second process responsive to the first process writing to the monitored memory area;
the second process reads the operation code and the packet data from the monitored memory area;
responsive to the operation code, the second process writes the packet data to a segment of memory belonging to a network protocol stack;
the first process polls an output memory area for output of the sending of the packet;
the second process writes an output of the sending of the packet to the output memory area; and
the first process reads the output from the output memory area.
5. The computer system of claim 4 , wherein the second process initializing the memory monitoring hardware comprises the second process executing a MONITOR instruction of an SSE3 processor instruction set.
6. The computer system of claim 4 , wherein:
the computer processor comprises a plurality of cores;
the first process is executed by a first one of the cores; and
the second process is executed by a second one of the cores; and
the second process executes a wait instruction that causes the second core to enter a dormant state until a write to the monitored memory takes place.
7. A non-transitory computer-readable storage medium having executable computer program instructions for a first process and for a second process embodied therein, the instructions when executed by a processor performing actions comprising:
the second process detecting memory write sizes that will cause memory monitoring hardware of a processor to wake a waiting processor core;
the second process initializing, based on the detected memory write sizes, a monitored memory area for use by processes having at least a privilege level of a first process, the second process having a higher privilege level than the privilege level of the first process;
the second process initializing memory monitoring hardware of a processor to monitor writes to the monitored memory area;
the first process writing, to the monitored memory area, an operation code specifying sending a packet over a network interface by the second process, and packet data representing the packet;
the second process reading the operation code and the packet data from the monitored memory area responsive to a transfer of control initiated by the memory monitoring hardware responsive to the first process writing to the monitored memory area;
responsive to the operation code, the second process writes the packet data to a segment of memory belonging to a network protocol stack;
the first process polling an output memory area for output of the sending of the packet;
the second process writing an output of the sending of the packet to the output memory area; and
the first process reading the output from the output memory area.
8. The computer-readable storage medium of claim 7 , wherein the second process initializing the memory monitoring hardware comprises the second process executing a MONITOR instruction of an SSE3 processor instruction set.
9. The computer-readable storage medium of claim 7 , wherein the first process is executed by a first core of a multi-core processor and the second process is executed by a second core of the multi-core processor, the method further comprising the second process executing a wait instruction that causes the second core to enter a dormant state until a write to the monitored memory takes place.