Granted Patent B2

US 9,357,482 · App. 13/181,608 · Granted May 31, 2016

Abstract

Claims (52)

1. A computer-implemented dynamic power control management (DPCM) method for a base station, the method comprising:

collaborating with a plurality of components operating on at least one core of a multi-core processor to periodically obtain information for a plurality of cells supported by a base station over a specified interval, wherein the information comprises at least a call load, an uplink data rate, and a downlink data rate for the cells, and wherein the multi-core processor comprises a plurality of processor cores configured under a single symmetric multiprocessing partition and served by a single operating system instance that serves a shared control plane core and N cell specific data plane cores, where N is the number of configured cells on the base station;

using the information obtained from the components to determine if individual cells are operating at or below a threshold off-peak capacity over the specified interval;

using the information obtained from the components to determine if the base station is operating at or below a threshold off-leak capacity, over the specified interval;

implementing a plurality of state machines comprising a first type state machine and a second type state machine, wherein the first type state machine is configured to manipulate a processor core frequency of a respective one of the cell specific data plane cores and the second type state machine is configured to manipulate a processor core frequency of the shared data plane core used by the configured cells on the base station;

asynchronously sending at least one state transition trigger to a DCPM module for a first of the first type state machines wherein the at least one state transition trigger is based at least upon a first threshold determination for a first of the configured cells;

asynchronously sending at least one state transition trigger to a DCPM module for the second type state machine, wherein the at least one state transition trigger is based at least upon the threshold determination for the cumulative base station.

2. The method of claim 1 , wherein the method is performed by an Operations, Administration, and Management process module on the shared control plane core of the multi-core processor.

3. The method of claim 1 , wherein the plurality of components comprises at least a call management processing module and a transport processing module.

4. The method of claim 1 , further comprising:

obtaining call load information for at least one cell from a call management processing module on the shared control plane core of the multi-core processor;

obtaining uplink and downlink data rates for at least one cell from a transport process module on the shared control plane core of the multi-core processor.

5. The method of claim 1 , wherein the first type state machine governs dedicated cores of the multi-core processor and includes at least a normal state, a dynamic frequency scaling (DFS) state, a doze state, and a nap state.

6. The method of claim 5 , wherein the first type state machine operates in the following manner:

the first type state machine transitions to the DFS state when the system load is less than or equal to specified threshold P such as half the full system capacity for a number of consecutive polling cycles C;

the first type state machine transitions to the doze state when there is no system load for a particular cell while the cell is in the DFS state for a number of consecutive polling cycles D;

the first type state machine transitions to the nap state when there is no system activity for a consecutive number of polling cycles E while the cell is in the doze state;

the first type state machine transitions from the doze state to the DFS state when a call is received on the cell;

the first type state machine transitions from the nap state to the DFS state when a call is received on the cell;

when the first type state machine is in DFS state and the system load increases above the threshold P for a number of consecutive polling cycles M, the first type state machine reverts back to the normal state.

7. The method of claim 1 , wherein the second type state machine governs shared cores of the multi-core processor and includes at least a normal state and a dynamic frequency scaling (DFS) state.

8. The method of claim 7 , wherein the second type state machine operates in the following manner:

the second type state machine transitions to the DFS state when the system load is less than or equal to the specified threshold P for a number of consecutive polling cycles C, wherein the specified threshold P is half the full system capacity;

when the system load increases above the threshold P for a number of consecutive polling cycles M, the second type state machine reverts back to the normal state.

9. The method of claim 1 , wherein the second type state machine governs shared cores of the multi-core processor.

10. The method of claim 9 , wherein the first type state machine includes at least a normal state, a dynamic frequency scaling (DFS) state, a doze state, and a nap state and the second state machine includes at least a normal state and a DFS state.

11. A non-transitory computer-usable data carrier storing instructions that, when executed by a computer, cause the computer to perform a dynamic power control management (DPCM) method for a multi-cell base station, the method comprising:

collaborating with a plurality of components operating on at least one core of a multi-core processor to periodically obtain information for a plurality of cells supported by a base station over a specified interval, wherein the information comprises at least a call load, an uplink data rate, and a downlink data rate for the cells and wherein the multi-core processor comprises a plurality of processor cores configured under a single symmetric multiprocessing partition and served by a single operating system instance that serves a shared control plane core and N cell specific data plane cores, where N is the number of configured cells on the base station;

using the information obtained from the components to determine if individual cells are operating at or below a threshold off-peak capacity over the specified interval;

using the information obtained from the components to determine if the base station is operating at or below a threshold off-peak capacity over the specified interval;

implementing a plurality of state machines comprising a first type state machine and a second type state machine, wherein the first type state machine is configured to manipulate a processor core frequency of a respective one of the cell specific data plane cores and the second type state machine is configured to manipulate a processor core frequency of the shared data plane core used by the configured cells on the base station;

asynchronously sending at least one state transition trigger to a DCPM module for a first of the first type state machines wherein the at least one state transition trigger is based at least upon a first individual cell threshold determination for a first of the configured cells;

asynchronously sending at least one state transition trigger to a DCPM module for the second type state machine, wherein the at least one state transition trigger is based at least upon the cumulative base station threshold determination.

12. The non-transitory computer-usable data carrier of claim 11 , wherein the method is performed by an Operations, Administration, and Management process module on the shared control plane core of the multi-core processor.

13. The non-transitory computer-usable data carrier of claim 11 , wherein the plurality of components comprises at least a call management processing module and a transport process module.

14. The non-transitory computer-usable data carrier of claim 11 , wherein the method further comprises:

obtaining call load information for at least one cell from a call management processing module on the shared control plane core of the multi-core processor;

obtaining uplink and downlink data rates for at least one cell from a transport process module on the shared control plane core of the multi-core processor.

15. The non-transitory computer-usable data carrier of claim 11 , wherein the first type state machine governs dedicated cores of the multi-core processor and the second type state machine governs shared cores of the multi-core processor.

16. The non-transitory computer-usable data carrier of claim 15 , wherein the first type state machine includes at least a normal state, a dynamic frequency scaling (DFS) state, a doze state, and a nap state and the second type state machine includes at least a normal state and a DFS state.

17. The non-transitory computer-usable data carrier of claim 11 , wherein the first type state machine governs dedicated cores of the multi-core processor and includes at least a normal state, a dynamic frequency scaling (DFS) state, a doze state, and a nap state.

18. The non-transitory computer-usable data carrier of claim 17 , wherein the first type state machine operates in the following manner:

the first type state machine transitions to the DFS state when the system load is less than or equal to a specified threshold such as half the full system capacity for a number of consecutive polling cycles C;

the first type state machine transitions to the doze state when there is no system load for a particular cell while the cell is in the DFS state for a number of consecutive polling cycles D;

the first type state machine transitions to the nap state when there is no system activity for a consecutive number of polling cycles E while the cell is in the doze state;

the first type state machine transitions from the doze state to the DFS state when a call is received on the cell;

the first type state machine transitions from the nap state to the DFS state when a call is received on the cell;

when the first type state machine is in DFS state and the system load increases above the threshold P for a number of consecutive polling cycles M, the first type state machine reverts back to the normal state.

19. The non-transitory computer-usable data carrier of claim 11 , wherein the second type state machine governs shared cores of the multi-core processor and includes at least a normal state and a dynamic frequency scaling (DFS) state.

20. The non-transitory computer-usable data carrier of claim 19 , wherein the second type state machine operates in the following manner:

the second type state machine transitions to the DFS state when the system load is less than or equal to the specified threshold P for a number of consecutive polling cycles C, wherein the specified threshold P is half the full system capacity;

when the system load increases above the threshold P for a number of consecutive polling cycles M, the second type state machine reverts back to the normal state.

Assignments (10)